PI49FCT804ATP Ver la hoja de datos (PDF) - Pericom Semiconductor
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PI49FCT804ATP Datasheet PDF : 6 Pages
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PI49FCT804T
Buffer/Clock Driver 1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
PI49FCT804T Switching Characteristics over Operating Range
Parameters
Description
tPLH
Propagation Delay
tPHL
INA to OAN, OEB to OBN
tPZH
Output Enable Time
tPZL
OEA to OAN, OEB to OBN
tPHZ
Output Disable Time
tPLZ
OEA to OAN, OEB to OBN
tSKEW(O)(3)
Skew between two outputs of same package
(same transition)
tSKEW(p)(3)
Skew between opposite transitions (tPHL-tPLH)of
the same package
tSKEW(t)(3)
Skew between two outputs of different packages
at same temperature (same transition)
Conditions(1)
CL = 50pF
RL = 500Ω
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worse cast temperature (max. temp).
804T
Com.
Min. Max.
1.5
6.5
1.5
8.0
1.5
7.0
0.8
1.0
1.6
804AT
Com.
Min. Max.
Units
1.5
5.8
1.5
8.0
1.5
7.0
ns
0.7
0.8
1.4
Tests Circuits For All Outputs(1)
VCC
VIN
Pulse
Generator
VOUT
D.U.T.
500Ω
50pF
RT
CL
500Ω
Switch Position
Test
Open Drain
7.0V
Disable LOW
Enable LOW
All Other Inputs
Switch
Closed
Open
Definitions:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the
Pulse Generator.
4
PS7005B 06/26/01
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