PIC18F6520 Ver la hoja de datos (PDF) - Microchip Technology
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PIC18F6520
Microchip Technology
PIC18F6520 Datasheet PDF : 380 Pages
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PIC18F6520/8520/6620/8620/6720/8720
TABLE 1-2: PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
PIC18F6X20 PIC18F8X20 Type
Buffer
Type
Description
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
24
30
I/O
TTL
Digital I/O.
I Analog
Analog input 0.
RA1/AN1
RA1
AN1
23
29
I/O
TTL
Digital I/O.
I Analog
Analog input 1.
RA2/AN2/VREF-
RA2
AN2
VREF-
22
28
I/O
TTL
Digital I/O.
I Analog
Analog input 2.
I Analog
A/D reference voltage (Low) input.
RA3/AN3/VREF+
RA3
AN3
VREF+
RA4/T0CKI
RA4
T0CKI
21
27
I/O
TTL
Digital I/O.
I Analog
Analog input 3.
I Analog
A/D reference voltage (High) input.
28
34
I/O ST/OD
Digital I/O – Open-drain when
configured as output.
I
ST
Timer0 external clock input.
RA5/AN4/LVDIN
27
33
RA5
I/O
TTL
Digital I/O.
AN4
I Analog
Analog input 4.
LVDIN
I Analog
Low-Voltage Detect input.
RA6
See the OSC2/CLKO/RA6 pin.
Legend:
Note 1:
2:
3:
4:
5:
6:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS = CMOS compatible input or output
Analog = Analog input
O
= Output
OD = Open-Drain (no P diode to VDD)
Alternate assignment for CCP2 when CCP2MX is not selected (all operating modes except
Microcontroller).
Default assignment when CCP2MX is set.
External memory interface functions are only available on PIC18F8X20 devices.
CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for
proper operation of the part in user or ICSP modes. See parameter D001A for details.
DS39609C-page 12
2003-2013 Microchip Technology Inc.
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