RTL8100 Ver la hoja de datos (PDF) - Unspecified

Número de pieza

componentes Descripción

Lista de partido

RTL8100

REALTEK 3.3V SINGLE CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT

Unspecified 

00D2h

R/W

00D3h

R/W

00D4h-00D7h

-

00D8h

R/W

00D9h-00FFh

-

LSBCRC6

LSBCRC7

-

Config5

-

RTL8100B(L)

LSB of the mask byte of wakeup frame6 within offset 12 to 75

LSB of the mask byte of wakeup frame7 within offset 12 to 75

Reserved

Configuration register 5

Reserved

5.1 Receive Status Register in Rx packet header

Bit

R/W

Symbol

Description

15

R

MAR

Multicast Address Received: This bit set to 1 indicates that a multicast

packet is received.

14

R

PAM

Physical Address Matched: This bit set to 1 indicates that the destination

address of this packet matches the value written in ID registers.

13

R

BAR

Broadcast Address Received: This bit set to 1 indicates that a broadcast

packet is received. BAR, MAR bit will not be set simultaneously.

12-6

-

-

Reserved

5

R

ISE

Invalid Symbol Error: (100BASE-TX only) This bit set to 1 indicates

that an invalid symbol was encountered during the reception of this packet.

4

R

RUNT

Runt Packet Received: This bit set to 1 indicates that the received packet

length is smaller than 64 bytes ( i.e. media header + data + CRC < 64

bytes )

3

R

LONG

Long Packet: This bit set to 1 indicates that the size of the received

packet exceeds 4k bytes.

2

R

CRC

CRC Error: When set, indicates that a CRC error occurred on the

received packet.

1

R

FAE

Frame Alignment Error: When set, indicates that a frame alignment

error occurred on this received packet.

0

R

ROK

Receive OK: When set, indicates that a good packet is received.

2001-11-9

12

Rev.1.41

Share Link: