RTL8201CP-LF Ver la hoja de datos (PDF) - Unspecified

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RTL8201CP-LF

SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)

Unspecified 

6.8. Register 16 NWay Setup Register (NSR)

Address

16:15~12

16:11

16:10

16:9

16:8~3

16:2

16:1

16:0

Name

Reserved

ENNWLE

Testfun

NWLPBK

Reserved

FLAGABD

FLAGPDF

FLAGLSC

Table 16. Register 16 NWay Setup Register (NSR)

Description

1: LED4 Pin indicates linkpulse

1: Auto-negotiation speeds up internal timer

1: Set NWay to loopback mode

1: Auto-negotiation experienced ability detect state

1: Auto-negotiation experienced parallel detection fault state

1: Auto-negotiation experienced link status check state

RTL8201CP

Datasheet

Mode Default

RW

0

RW

0

RW

0

RO

0

RO

0

RO

0

6.9. Register 17 Loopback, Bypass, Receiver Error Mask

Register (LBREMR)

Address

17:15

17:14

17:13

17:12

17:11

17:10

17:9

17:8

17:7

17:6

17:5

17:4

17:3

17:2

17:1

17:0

Table 17. Register 17 Loopback, Bypass, Receiver Error Mask Register (LBREMR)

Name

Description

Mode

RPTR

Set to 1 to put the RTL8201CP into repeater mode.

RW

BP_4B5B Assertion of this bit allows bypassing of the 4B/5B & 5B/4B

RW

encoder.

BP_SCR Assertion of this bit allows bypassing of the

RW

scrambler/descrambler.

LDPS

Set to 1 to enable Link Down Power Saving mode.

RW

AnalogOFF Set to 1 to power down analog function of transmitter and receiver. RW

Reserve Reserved.

LB

Set to 1 to enable DSP Loopback.

RW

F_Link_10 Used to logic force good link in 10Mbps for diagnostic purposes.

RW

F_Link_100 Used to logic force good link in 100Mbps for diagnostic purposes. RW

JBEN

Set to 1 to enable Jabber Function in 10Base-T.

RW

CODE_err Assertion of this bit causes a code error detection to be reported.

RW

PME_err Assertion of this bit causes a pre-mature end error detection to be

RW

reported.

LINK_err Assertion of this bit causes a link error detection to be reported.

RW

PKT_err Assertion of this bit causes a ‘detection of packet errors due to

RW

722 ms time-out’ to be reported.

FXMODE This bit indicates whether Fiber Mode is Enabled.

RO

RMIIMODE This bit indicates whether RMII mode is Enabled.

RO

Default

0

0

0

0

0

0

1

1

0

1

0

0

0

0

0

Single-Chip/Port 10/100 Fast Ethernet PHYceiver

12

Track ID: JATR-1076-21 Rev. 1.21

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