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RTL8305SC-LF

SINGLE-CHIP 5-PORT 10/100MBPS SWITCH CONTROLLER WITH DUAL MII INTERFACES

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RTL8305SC

Datasheet

TABLE 108. PHY 2 REGISTER 28: VLAN ID [M] MEMBERSHIP...................................................................................................73

TABLE 109. PHY 2 REGISTER 29: RESERVED REGISTER ...............................................................................................................74

TABLE 110. PHY 2 REGISTER 29: VLAN ID [M] .........................................................................................................................74

TABLE 111. PHY 3 REGISTER 16~18: SWITCH MAC ADDRESS ....................................................................................................75

TABLE 112. PHY 3 REGISTER 19~21: INTERNAL USE REGISTER ..................................................................................................76

TABLE 113. PHY 3 REGISTER 24: PORT 3 CONTROL REGISTER 1 & VLAN ID [D] MEMBERSHIP................................................76

TABLE 114. PHY 3 REGISTER 25: PORT 3 CONTROL REGISTER 2 & VLAN ID [D] ......................................................................77

TABLE 115. PHY 3 REGISTER 26: RESERVED REGISTER ...............................................................................................................77

TABLE 116. PHY 3 REGISTER 26: VLAN ID [I] MEMBERSHIP .....................................................................................................77

TABLE 117. PHY 3 REGISTER 27: RESERVED REGISTER ...............................................................................................................78

TABLE 118. PHY 3 REGISTER 27: VLAN ID [I] ...........................................................................................................................78

TABLE 119. PHY 3 REGISTER 28: RESERVED REGISTER ...............................................................................................................78

TABLE 120. PHY 3 REGISTER 28: VLAN ID [N] MEMBERSHIP ...................................................................................................78

TABLE 121. PHY 3 REGISTER 29: RESERVED REGISTER ...............................................................................................................79

TABLE 122. PHY 3 REGISTER 29: VLAN ID [N]..........................................................................................................................79

TABLE 123. PHY 4 REGISTER 16: INDIRECT ACCESS CONTROL....................................................................................................80

TABLE 124. PHY 4 REGISTER 17~20: INDIRECT ACCESS DATA ....................................................................................................81

TABLE 125. PHY 2 REGISTER 20: 802.1P BASE PRIORITY ............................................................................................................81

TABLE 126. PHY 4 REGISTER 24: PORT 4 CONTROL REGISTER 1 & VLAN ID [E] MEMBERSHIP ................................................82

TABLE 127. PHY 4 REGISTER 25: PORT 4 CONTROL REGISTER 2 & VLAN ID [E] ......................................................................83

TABLE 128. PHY 4 REGISTER 26: RESERVED REGISTER ...............................................................................................................83

TABLE 129. PHY 4 REGISTER 26: VLAN ID [J] MEMBERSHIP.....................................................................................................83

TABLE 130. PHY 4 REGISTER 27: RESERVED REGISTER ...............................................................................................................84

TABLE 131. PHY 4 REGISTER 27: VLAN ID [J]...........................................................................................................................84

TABLE 132. PHY 4 REGISTER 28: RESERVED REGISTER ...............................................................................................................84

TABLE 133. PHY 4 REGISTER 28: VLAN ID [O] MEMBERSHIP ...................................................................................................84

TABLE 134. PHY 4 REGISTER 29: RESERVED REGISTER ...............................................................................................................85

TABLE 135. PHY 4 REGISTER 29: VLAN ID [O]..........................................................................................................................85

TABLE 136. PHY 5 REGISTER 0: CONTROL...................................................................................................................................86

TABLE 137. PHY 5 REGISTER 1: STATUS ......................................................................................................................................87

TABLE 138. PHY 5 REGISTER 2: PHY IDENTIFIER 1 .....................................................................................................................87

TABLE 139. PHY 5 REGISTER 3: PHY IDENTIFIER 2 .....................................................................................................................87

TABLE 140. PHY 5 REGISTER 4: AUTO-NEGOTIATION ADVERTISEMENT ......................................................................................88

TABLE 141. MII PORT NWAY MODE .............................................................................................................................................89

TABLE 142. MII PORT FORCE MODE.............................................................................................................................................89

TABLE 143. MII REGISTER DEFINITION FOR PHY 4 AND PHY 5.................................................................................................103

TABLE 144. PECL DC CHARACTERISTICS ..................................................................................................................................112

TABLE 145. SMI READ/WRITE CYCLES ......................................................................................................................................119

TABLE 146. 802.1Q VLAN TAG FRAME FORMAT .......................................................................................................................124

TABLE 147. IPV4 FRAME FORMAT ..............................................................................................................................................124

TABLE 148. RESERVED MULTICAST ADDRESS.............................................................................................................................125

TABLE 149. LOOP FRAME FORMAT..............................................................................................................................................127

TABLE 150. SPD AND BI-COLOR LINK/ACT TRUTH TABLE ..........................................................................................................130

TABLE 151. AN EXAMPLE USING POWER TRANSISTOR 2SB1188................................................................................................132

TABLE 152. ELECTRICAL CHARACTERISTICS/RATINGS ...............................................................................................................133

TABLE 153. LED TIMING ............................................................................................................................................................136

TABLE 154. MII & SMI DC TIMING...........................................................................................................................................137

TABLE 155. PACKAGE DESCRIPTION ...........................................................................................................................................139

TABLE 156. PCB DESCRIPTION ...................................................................................................................................................139

TABLE 157. ASSEMBLY MATERIAL ..............................................................................................................................................139

TABLE 158. SIMULATION ANALYSIS CONDITIONS .......................................................................................................................140

TABLE 159. RESULTS...................................................................................................................................................................140

TABLE 160. TRANSFORMER VENDORS ........................................................................................................................................141

TABLE 161. ORDERING INFORMATION.........................................................................................................................................148

5-port 10/100Mbps Single-Chip Dual MII Switch Controller xi

Track ID: JATR-1076-21 Rev. 1.2

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