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RTL8305SC-LF

SINGLE-CHIP 5-PORT 10/100MBPS SWITCH CONTROLLER WITH DUAL MII INTERFACES

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Table of Contents

RTL8305SC

Datasheet

1. GENERAL DESCRIPTION................................................................................................................................................1

2. FEATURES...........................................................................................................................................................................4

3. BLOCK DIAGRAM.............................................................................................................................................................6

4. PIN ASSIGNMENTS ...........................................................................................................................................................7

5. PIN DESCRIPTIONS ..........................................................................................................................................................9

5.1.

5.2.

5.3.

5.4.

5.5.

5.6.

5.7.

5.8.

5.9.

5.10.

MEDIA CONNECTION PINS............................................................................................................................................9

PORT 4 CONFIGURATION PINS ......................................................................................................................................9

PORT 4 MAC CIRCUIT INTERFACE PINS .....................................................................................................................14

PORT 4 PHY CIRCUIT INTERFACE PINS ......................................................................................................................16

MISCELLANEOUS PINS ...............................................................................................................................................19

PORT LED PINS .........................................................................................................................................................20

SERIAL EEPROM AND SMI PINS ..............................................................................................................................22

STRAPPING PINS.........................................................................................................................................................22

PORT STATUS STRAPPING PINS ...................................................................................................................................24

POWER PINS ...............................................................................................................................................................26

6. EEPROM DESCRIPTION................................................................................................................................................27

6.1. PORT 0 REGISTERS .....................................................................................................................................................27

6.1.1. Global Control Register0 .....................................................................................................................................27

6.1.2. Global Control Register1 .....................................................................................................................................27

6.1.3. Global Control Register2 .....................................................................................................................................28

6.1.4. Global Control Register3 .....................................................................................................................................28

6.1.5. Global Control Register4 .....................................................................................................................................28

6.1.6. Global Control Register5 .....................................................................................................................................29

6.1.7. Global Control Register6 .....................................................................................................................................29

6.1.8. Global Control Register7 .....................................................................................................................................30

6.1.9. Port 0 Control 0....................................................................................................................................................30

6.1.10. Port 0 Control 1....................................................................................................................................................31

6.1.11. Port 0 Control 2....................................................................................................................................................31

6.1.12. Port 0 Control 3....................................................................................................................................................31

6.1.13. Port 0 Control 4 & VLAN Entry [A].....................................................................................................................32

6.2. PORT 1 REGISTERS .....................................................................................................................................................33

6.2.1. Internal Use Register............................................................................................................................................33

6.2.2. Port 1 Control 0....................................................................................................................................................33

6.2.3. Port 1 Control 1....................................................................................................................................................34

6.2.4. Port 1 Control 2....................................................................................................................................................34

6.2.5. Port 1 Control 3....................................................................................................................................................34

6.2.6. Port 1 Control 4 & VLAN Entry [B].....................................................................................................................35

6.3. PORT 2 REGISTERS .....................................................................................................................................................36

6.3.1. Internal Use Register............................................................................................................................................36

6.3.2. Port 2 Control 0....................................................................................................................................................36

6.3.3. Port 2 Control 1....................................................................................................................................................37

6.3.4. Reserved ...............................................................................................................................................................37

6.3.5. Port 2 Control 2 & VLAN Entry [C] ....................................................................................................................38

6.4. PORT 3 REGISTERS .....................................................................................................................................................39

6.4.1. Switch MAC Address ............................................................................................................................................39

6.4.2. Port 3 Control 0....................................................................................................................................................39

6.4.3. Port 3 Control 1....................................................................................................................................................40

6.4.4. Reserved ...............................................................................................................................................................40

5-port 10/100Mbps Single-Chip Dual MII Switch Controller iv

Track ID: JATR-1076-21 Rev. 1.2

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