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UPD4990AC

SERIAL I/O CALENDAR & CLOCK CMOS LSI

NEC => Renesas Technology 

µPD4990A

(2) TP selection and control [C2, C1, C0] / [C3', C2', C1', C0']

• TP = 64 Hz Set Mode [1, 0, 0] / [0, 1, 0, 0]

64 Hz (50 % duty) is output to the TP pin.

[C2, C1, C0]: The year function is ineffective and the interval timer stops.

• TP = 256 Hz Set Mode [1, 0, 1] / [0, 1, 0, 1]

256 Hz (50 % duty) is output to the TP pin.

[C2, C1, C0]: The year function is ineffective and the interval timer stops.

• TP = 2 048 Hz Set Mode [1, 1, 0] / [0, 1, 1, 0]

2 048 Hz (50 % duty) is output to the TP pin.

[C2, C1, C0]: The year function is ineffective and the interval timer stops.

Modes permitted only for serial commands

• TP = 4 098 Hz Set Mode [0, 1, 1, 1]

[C3', C2', C1', C0']

4 098 Hz (50 % duty) is output to the TP pin. The interval timer stops.

• TP = 1-second Interval Set Mode (counter reset & start) [1, 0, 0, 0]

A 1-second interval signal is output to the TP pin.

• TP = 10-second Interval Set Mode (counter reset & start) [1, 0, 0, 1]

A 10-second interval signal is output to the TP pin.

• TP = 30-second Interval Set Mode (counter reset & start) [1, 0, 1, 0]

A 30-second interval signal is output to the TP pin.

• TP = 60-second Interval Set Mode (counter reset & start) [1, 0, 1, 1]

A 60-second interval signal is output to the TP pin.

• Interval Output Flag Reset [1, 1, 0, 0]

The interval signal output to the TP pin is reset.

The interval timer counter continue the operation.

• Interval Timer Clock Run [1, 1, 0, 1]

The timer for outputting interval signals is reset then started.

• Interval Timer Clock Stop [1, 1, 1, 0]

The timer for outputting interval signals stops.

The output status does not change.

(3) Serial command transfer mode setting

Set [C2, C1, C0] = [1, 1, 1]

(4) Test mode setting

Set [C2, C1, C0] = [1, 1, 1] [C3', C2', C1', C0'] = [1, 1, 1, 1]

° 3-bit parallel command setting mode

[C2, C1, C0]

The year function is ineffective when commands are input through C2, C1, and C0 pins.

Generally, February involves 28 days. The 29th day can be set optionally. The next day of the February

29th can be set the March 1st automatically. The interval timer is in the halt state.

* The test mode is cancelled by [C2, C1, C0] = [0, 0, 0] to [1, 1, 0].

° Serial command transfer mode

[C3', C2', C1', C0']

If a strobe signal is input with C2, C1, and C0 pins set at the VDD level ([1, 1, 1]), the contents of the serial

command register ([C3', C2', C1', C0']) are received as a command; the year function is effective.

* The test mode is cancelled by [C3', C2', C1', C0']

= [0, 0, 0]

= [0, 1, 0, 0] to [1, 1, 1, 0]

In this mode, the serial command register is not held with the Register Hold command. Accordingly, the serial

command can be executed irrespective of the mode if the CS pin is active.

The year function is effective in the serial command transfer mode.

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