XRT91L81 Ver la hoja de datos (PDF) - Exar Corporation

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XRT91L81

2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER

Exar Corporation 

PRELIMINARY

TRANSMITTER SECTION

NAME

LEVEL

REFFREQSEL

LVTTL

VCXO_SEL

LVTTL

VCXO_LOCK

LVTTL

VCXO_LOCKEN

LVTTL

CPOUT

LOOPBW

-

LVTTL

TXPCLKOP

TXPCLKON

LVDS

TXCLKO16P

TXCLKO16N

LVDS

TRITXCLKO16

LVTTL

XRT91L81

2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER

REV. P1.0.3

TYPE

I

I

O

I

O

I

O

O

I

PIN

DESCRIPTION

P1 Reference Clock Frequency Select

Hardware Mode This pin is used to select the frequency of the

REFCLK input to the CMU.

"Low" = 77.76MHz (83.5MHz for FEC)

"High" = 155.52MHz (167MHz for FEC)

M6 Selects De-Jitter VCXO Option

Hardware Mode This pin selects either the normal REFCLK or

the de-jitter VCXO as a reference clock.

"Low" = Normal REFCLK Mode

"High" = De-Jitter VCXO Mode

N8 De-Jitter PLL Lock Detect

If the de-jitter PLL lock detect is enabled with Pin P3 and the

de-jitter VCXO mode is selected by Pin M6, this pin will pull

"High" when the PLL is locked.

"Low" = VCXO out of Lock

"High" = VCXO Locked

P3 De-Jitter PLL Lock Detect Enable

Hardware Mode This pin enables the VCXO lock detect Pin N8

to be active.

"Low" = VCXO_LOCK disabled

"High" = VCXO_LOCK enabled

P8 Charge Pump Output (for external VCXO)

The nominal output of the charge pump is 250µA

M7 CMU Loop Bandwidth Select

Hardware Mode This pin is used to select the bandwidth of the

clock multiplier unit of the transmit path to a narrow or wide

band.

"Low" = Narrow Band (1x)

"High" = Wide Band (4x)

P10 Transmit Clock Output (622/666 MHz)

P11 This clock can be used for the downstream device to generate

the TXDI data and TXCLK. This enables the downstream

device and the OC-48 transceiver to be in synchronization.

N10 Auxillary Clock

N11 155.52(166)MHz auxillary clock derived from CMU output. This

clock can also be used for the downstream device as a refer-

ence for generating the TXDI data and TXCLK. This enables

the downstream device and the OC-48 transceiver to be in syn-

chronization.

M12 Tri-State Enable

Hardware Mode This pin is used to tri-state the auxillary clock.

"Low" = TXCLKO16 Enabled

"High" = TXCLKO16 Tri-State

7

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