5962D9568801VGA Ver la hoja de datos (PDF) - Intersil

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5962D9568801VGA

Radiation Hardened, Very Wideband, High Input Impedance Uncompensated Operational Amplifiers

Intersil 

HS-2620RH, HS-2622RH

Test Circuit

400

1.6K

ACOUT

100K

1 OPEN

2 S3A

S1 1

OPEN 2

S2 1

OPEN 2

100K 2 S3B

+VCC

0.1 1

2

1 S5A

1 S6

S7 OPEN

3

1

RAL 2

-

ADJ

2

DUT

+

S5B 1

2

OPEN 1

50pF (NOTE)

500K

OPEN

S8

31

2

S9

2

V2

-1/10

V1

FOR LOOP STABILITY,

USE MIN VALUE CAPACITOR

TO PREVENT OSCILLATION

50K

+-1

-

+

BUFFER

1

100

100

OPEN VAC

50

0.1 1

-VEE

2K

10K

x2

EOUT

5K

2

S4

1

50K

NOTE: Includes stray capacitances.

ALL RESISTORS = ±1% (Ω)

ALL CAPACITORS = ±10% (µF)

FIGURE 1. TEST LOOP FOR THE HS-2620RH AND THE HS-2622RH

Test Circuits and Waveforms

VAC IN

50Ω

+

-

1.6K

VAC OUT

50pF

400Ω

+1.0V

-1.0V

FIGURE 2. SIMPLIFIED TEST CIRCUIT

+5.0V

+5.0V

INPUT

+SL

-SL

+1.0V

- 1.0V

-5.0V

∆V

OUTPUT

∆V

-5.0V

∆V

∆ T SR =

∆T

∆T

FIGURE 3. SLEW RATE WAVEFORM

+40mV

0V

tr, +OS

INPUT

0V

tf, -OS

-40mV

VPEAK

90%

10%

0V

VFINAL = +200mV

OUTPUT

tr

tf

NOTE: Measured on both positive and negative transitions. Capacitance at Compensation pin should be minimized.

FIGURE 4. OVERSHOOT, RISE AND FALL TIME WAVEFORMS

0V

10%

90% -200mV

VPEAK

2

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