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IC61C6416

20ns; 5V; 64K x 16 high-speed CMOS static RAM

Integrated Circuit Solution Inc 

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CAPACITANCE(1)

Symbol

CIN

COUT

Parameter

Input Capacitance

Input/Output Capacitance

Conditions

VIN = 0V

VOUT = 0V

Max.

Unit

6

p.

8

p.

Note:

1. Tested initially and after any design or process changes that may affect these parameters.

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol

tRC

tAA

tOHA

tACE

tDOE

tHZOE 

tLZOE 

tHZCE

tLZCE 

tBA

tHZB

tLZB

Parameter

Read Cycle Time

Address Access Time

Output Hold Time

CE Access Time

OE Access Time

OE to High-Z Output

OE to Low-Z Output

CE to High-Z Output

CE to Low-Z Output

LB, UB Access Time

LB, UB to High-Z Output

LB, UB to Low-Z Output

-10

-12

-15

-20

Min. Max.

Min. Max. Min. Max.

Min. Max.

Unit

10 —

12 —

15 —

20 —

ns

— 10

— 12

— 15

— 20

ns

3—

3—

3—

4—

ns

— 10

— 12

— 15

— 20

ns

—5

—6

—7

—9

ns

—5

—6

06

08

ns

0—

0—

0—

0—

ns

05

06

06

08

ns

3—

3—

3—

3—

ns

—5

—6

—7

—9

ns

05

06

06

08

ns

0—

0—

0—

0—

ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V

and output loading specified in .igure 1.

2. Tested with the load in .igure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and .all Times

Input and Output Timing

and Reference Level

Output Load

Unit

0V to 3.0V

3 ns

1.5V

See .igures 1 and 2

AC TEST LOADS

480 Ω

5V

OUTPUT

30 pF

Including

jig and

scope

.igure 1

255 Ω

4

480 Ω

5V

OUTPUT

5 pF

Including

jig and

scope

.igure 2

255 Ω

Integrated Circuit Solution Inc.

AHSR011-0A 05/23/2001

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