A43L8316AV-5.5 Ver la hoja de datos (PDF) - AMIC Technology

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A43L8316AV-5.5

128K X 16 Bit X 2 Banks Synchronous DRAM

AMIC Technology 

Decoupling Capacitance Guide Line

Recommended decoupling capacitance added to power line at board.

Parameter

Decoupling Capacitance between VDD and VSS

Decoupling Capacitance between VDDQ and VSSQ

Symbol

CDC1

CDC2

Note: 1. VDD and VDDQ pins are separated each other.

All VDD pins are connected in chip. All VDDQ pins are connected in chip.

2. VSS and VSSQ pins are separated each other

All VSS pins are connected in chip. All VSSQ pins are connected in chip.

Value

0.1 + 0.01

0.1 + 0.01

A43L8316A

Unit

µF

µF

DC Electrical Characteristics

(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)

Symbol

Parameter

Test Conditions

CAS

Speed

Latency -5 -5.5 -6

Unit Notes

-7

Operating Current Burst Length = 1

Icc1

(One Bank Active) tRC ≥ tRC(min), tCC ≥ tCC(min), IOL = 0mA

230 210 190 160 mA

1

Icc2 P

Icc2 PS

Precharge Standby CKE ≤ VIL(max), tCC = 15ns

Current in power-

down mode

CKL ≤ VIL(max), tCC = ∞

1

mA

1

ICC2N

ICC2NS

ICC3 P

ICC3 PS

Precharge Standby

Current in non

power-down mode

Active Standby

Current in power-

down mode

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns

Input signals are changed one time during 30ns

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable.

CKE ≤ VIL(max), tCC = 15ns

CKE ≤ VIL(max) tCC = ∞

15

mA

4

2

mA

1

ICC3N

ICC3NS

Active Standby

current in non

power-down mode

(One Bank Active)

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns

Input signals are changed one time during 30ns

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable.

25

mA

15

ICC4

Operating Current IOL = 0mA, Page Burst

(Burst Mode)

All bank Activated, tCCD = tCCD (min)

3

250 230 210 180

mA

1

2

-

--

180

ICC5 Refresh Current

tRC ≥ tRC (min)

250 230 210 180 mA

2

ICC6 Self Refresh

Current

CKE ≤ 0.2V

1

mA

Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).

2. Refresh period is 32ms. Addresses are changed only one time during tCC(min).

(September, 2003, Version 1.0)

5

AMIC Technology, Corp.

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