AD6652 Ver la hoja de datos (PDF) - Analog Devices
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AD6652 Datasheet PDF : 76 Pages
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AD6652
ELECTRICAL CHARACTERISTICS
AVDD = 3.0 V, VDD = 2.5 V, VDDIO = 3.3 V, 61.44 MSPS, −1.0 dBFS differential input, 1.0 V internal reference, unless otherwise noted.
Table 5.
Parameter (Conditions)
LOGIC INPUTS
Logic Compatibility
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
LOGIC OUTPUTS
Logic Compatibility
Logic 1 Voltage (VOH) (IOH = 0.25 mA)
Logic 0 Voltage (VOL) (IOL = 0.25 mA)
SUPPLY CURRENTS
Narrow Band (150 kHz BW) (61.44 MHz CLK)
Four Individual Channels
IAVDD
IVDD
IVDDIO
CDMA (1.25MHz BW) (61.44 MHz CLK) Example1
IAVDD
IVDD
IVDDIO
WCDMA (5 MHz BW) (61.44 MHz CLK) Example1
IAVDD
IVDD
IVDDIO
TOTAL POWER DISSIPATION
Narrow Band (150 kHz BW) (61.44 MHz CLK)
Four Individual Channels
CDMA (61.44 MHz)1
Temp Test Level Min
Full IV
Full IV
2.0
Full IV
Full IV
−10
Full IV
−10
25°C V
Full IV
Full IV
2.4
Full IV
25°C II
160
25°C II
240
25°C II
25
25°C V
25°C V
25°C V
25°C V
25°C V
25°C V
25°C II
1.2
25°C V
Typ
Max Unit
3.3 V CMOS
4
V
0.8
V
+10
µA
+10
µA
pF
3.3 V CMOS/TTL
VDDIO − 0.2
V
0.2
0.4
V
200
215
mA
280
300
mA
40
45
mA
200
mA
336
mA
68
mA
200
mA
330
mA
89
mA
1.5
1.6
W
1.7
W
WCDMA (61.44 MHz)1
25°C V
1.7
W
ADC in Standby and DDC in Sleep Mode2
25°C V
2.3
mW
1 All signal processing stages and all DDC channels active.
2 ADC standby power measured with ACLK inactive.
Rev. 0 | Page 7 of 76
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