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AD73411

Low-Power Analog Front End with DSP Microcomputer

Analog Devices 

AD73411

Parameter

Min

DAC SPECIFICATIONS (Continued)

Power Supply Rejection

Group Delay4, 5

Output DC Offset2, 7

–30

Typ Max

–81

25

50

+5

+50

Unit

dB

µs

µs

mV

Test Conditions/Comments

Input Signal Level at AVDD and DVDD

Pins: 1.0 kHz, 100 mV p-p Sine Wave

fSAMP = 64 kHz; Interpolator Bypassed

fSAMP = 64 kHz

PGA = 6 dB

LOGIC INPUTS

VINH, Input High Voltage

VINL, Input Low Voltage

IIH, Input Current

DVDD – 0.8

0

–10

DVDD V

0.8

V

+10

µA

LOGIC OUTPUT

VOH, Output High Voltage

VOL, Output Low Voltage

Three-State Leakage Current

DVDD – 0.4

0

–10

DVDD V

0.4

V

+10

µA

|IOUT| ≤ 100 µA

|IOUT| ≤ 100 µA

POWER SUPPLIES

AVDD

DVDD

IDD9

3.0

3.6

V

3.0

3.6

V

See Table I

NOTES

1Operating temperature range is as follows: –20°C to +85°C. Therefore, TMIN = –20°C and TMAX = +85°C.

2Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise noted).

3At input to sigma-delta modulator of ADC.

4Guaranteed by design.

5Overall group delay will be affected by the sample rate and the external digital filtering.

6The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (3.3 × 1011)/DMCLK.

7Between VOUTP and VOUTN.

8At VOUT output.

9Test Conditions: no load on digital inputs, analog inputs ac-coupled to ground, no load on analog outputs.

Specifications subject to change without notice.

REV. 0

–3–

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