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AD7401AYRWZ-RL

Isolated Sigma-Delta Modulator

Analog Devices 

AD7401A

THEORY OF OPERATION

CIRCUIT INFORMATION

The AD7401A isolated Σ-Δ modulator converts an analog input

signal into a high speed (20 MHz maximum), single-bit data

stream; the time average single-bit data from the modulators

is directly proportional to the input signal. Figure 23 shows a

typical application circuit where the AD7401A is used to provide

isolation between the analog input, a current sensing resistor,

and the digital output, which is then processed by a digital filter

to provide an N-bit word.

ANALOG INPUT

The differential analog input of the AD7401A is implemented

with a switched capacitor circuit. This circuit implements a

second-order modulator stage that digitizes the input signal

into a 1-bit output stream. The sample clock (MCLKIN)

provides the clock signal for the conversion process as well as

the output data-framing clock. This clock source is external

on the AD7401A. The analog input signal is continuously

sampled by the modulator and compared to an internal

voltage reference. A digital stream that accurately represents

the analog input over time appears at the output of the

converter (see Figure 21).

MODULATOR OUTPUT

+FS ANALOG INPUT

–FS ANALOG INPUT

ANALOG INPUT

Figure 21. Analog Input vs. Modulator Output

A differential signal of 0 V results (ideally) in a stream of alter-

nating 1s and 0s at the MDAT output pin. This output is high

50% of the time and low 50% of the time. A differential input of

200 mV produces a stream of 1s and 0s that are high 81.25% of

the time (for a +250 mV input, the output stream is high 89.06% of

the time). A differential input of −200 mV produces a stream of

1s and 0s that are high 18.75% of the time (for a −250 mV

input, the output stream is high 10.94% of the time).

A differential input of 320 mV results in a stream of, ideally, all

1s. This is the absolute full-scale range of the AD7401A, and

200 mV is the specified full-scale range, as shown in Table 9.

Table 9. Analog Input Range

Analog Input

Full-Scale Range

Positive Full Scale

Positive Typical Input Range

Positive Specified Input Range

Zero

Negative Specified Input Range

Negative Typical Input Range

Negative Full Scale

Voltage Input

+640 mV

+320 mV

+250 mV

+200 mV

0 mV

−200 mV

−250 mV

−320 mV

To reconstruct the original information, this output needs to be

digitally filtered and decimated. A sinc3 filter is recommended

because this is one order higher than that of the AD7401A modu-

lator. If a 256 decimation rate is used, the resulting 16-bit word

rate is 62.5 kHz, assuming a 16 MHz external clock frequency.

Figure 22 shows the transfer function of the AD7401A relative

to the 16-bit output.

65535

53248

SPECIFIED RANGE

12288

0

–320mV

–200mV

+200mV +320mV

ANALOG INPUT

Figure 22. Filtered and Decimated 16-Bit Transfer Characteristic

ISOLATED

5V

+

INPUT

CURRENT

RSHUNT

VDD1 AD7401A

VIN+

Σ-Δ

MOD/

ENCODER

VIN–

DECODER

GND1

DECODER

VDD2

MDAT

MCLKIN

NONISOLATED

5V/3V

VDD

SINC3 FILTER*

MDAT

MCLK

ENCODER

GND2

GND

CS

SCLK

SDAT

Figure 23. Typical Application Circuit

*THIS FILTER IS IMPLEMENTED

WITH AN FPGA OR DSP.

Rev. 0 | Page 14 of 20

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