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AD7457 Datasheet PDF : 20 Pages
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AD7457
VREF
P-TO-P
DC INPUT
VOLTAGE
0.1µF
+2.7V TO +5.25V
SUPPLY
10µF
VDD
AD7457
VIN+
SCLK
SDATA
VIN–
VREF
CS
GND
SERIAL
INTERFACE
µC/µP
0.33µF
2.5V
AD780
Figure 17. Typical Connection Diagram
ANALOG INPUT
The AD7457 has a pseudo differential analog input. The VIN+
input is coupled to the signal source and should have an
amplitude of VREF p-p to make use of the full dynamic range of
the part. A dc input is applied to the VIN–. The voltage applied to
this input provides an offset from ground or a pseudo ground
for the VIN+ input. Ensure that (VIN− + VIN+) is less than or equal
to VDD to avoid exceeding the maximum ratings of the ADC.
The main benefit of pseudo differential inputs is that they
separate the analog input signal ground from the ADC’s ground,
allowing dc common-mode voltages to be canceled.
Because the ADC operates from a single supply, it is necessary
to level shift ground-based bipolar signals to comply with the
input requirements. An op amp (for example, the AD8021) can
be configured to rescale and level shift a ground-based (bipolar)
signal, so that it is compatible with the input range of the
AD7457. See Figure 18.
When a conversion takes place, the pseudo ground corresponds
to 0 and the maximum analog input corresponds to 4096.
+1.25V
0V
–1.25V
R
VIN
3R
R
R
0.33µF
2.5V
1.25V
0V
VIN+
AD7457
VIN
VREF
EXTERNAL
VREF (2.5V)
Figure 18. Op Amp Configuration to Level Shift a Bipolar Input Signal
ANALOG INPUT STRUCTURE
Figure 19 shows the equivalent circuit of the analog input
structure of the AD7457. The four diodes provide ESD
protection for the analog inputs. Care must be taken to ensure
that the analog input signals never exceed the supply rails by
more than 300 mV, which causes these diodes to become
forward biased and start conducting into the substrate. These
diodes can conduct up to 10 mA without causing irreversible
damage to the part. The capacitors, C1 in Figure 19, are typically
4 pF and can be attributed primarily to pin capacitance. The
resistors are lumped components made up of the on resistance
of the switches. The value of these resistors is typically about
100 Ω. The capacitors, C2, are the ADC’s sampling capacitors,
which typically have a capacitance of 16 pF.
For ac applications, removing high frequency components from
the analog input signal through the use of an RC low pass filter
on the relevant analog input pins is recommended. In applica-
tions where harmonic distortion and the signal-to-noise ratio
are critical, the analog input should be driven from a low
impedance source. Large source impedances can significantly
affect the ac performance of the ADC, which may necessitate
the use of an input buffer amplifier. The choice of the op amp is
a function of the particular application.
VDD
D
VIN+
C1
D
R1
C2
VIN
C1
VDD
D
D
R1
C2
Figure 19. Equivalent Analog Input Circuit. Conversion Phase—Switches
Open; Track Phase—Switches Closed
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of total harmonic
distortion (THD) that can be tolerated. The THD increases as
the source impedance increases and performance degrades.
Figure 20 shows a graph of the THD versus analog input signal
frequency for different source impedances.
Rev. 0 | Page 12 of 20

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