ADF4193 Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Lista de partido

ADF4193

Low Phase Noise, Fast Settling PLL Frequency Synthesizer

Analog Devices 

Data Sheet

5

4

VTUNE

3

CPOUT+

2

1

0

–1 0

CPOUT–

DCS1800 Tx SETUP, 60kHz LOOP BW.

MEASURED ON EVAL-ADF4193-EB1

EVALUATION BOARD.

TIMERS: ICP = 28, SW1/SW2, SW3 = 35.

FREQUENCY LOCK IN WIDE BW MODE @ 4µs.

123456789

TIME (µs)

Figure 10. VTUNE Settling Transient for a 75 MHz Jump from 1818 MHz to

1893 MHz with Sirenza 1843T VCO

50

DCS1800 Tx SETUP, 60kHz LOOP BW.

40

MEASURED ON EVAL-ADF4193-EB1

EVALUATION BOARD WITH AD8302

PHASE DETECTOR.

30

TIMERS: ICP = 28, SW1/SW2, SW3 = 35.

+25°C PEAK PHASE ERROR < 5° @ 17.8µs

20

10

0

–10

–40°C +85°C

–20

–30

–40

–50

–5 0

5 10 15 20 25 30 35 40 45

TIME (µs)

Figure 11. Phase Settling Transient for a 75 MHz Jump from 1818 MHz to

1893 MHz (VTUNE 1.8 V to 3.7 V with Sirenza 1843T VCO)

8

2.0

ICPOUT + P, ICPOUT – P

6

1.5

4

IUP = | ICPOUT + P | + | ICPOUT – N |

1.0

IDOWN = | ICPOUT – P | + | ICPOUT + N |

2

0.5

CHARGE PUMP MISMATCH (%)

0

0

–2

NORMAL OPERATING RANGE

–0.5

–4

–1.0

–6

–1.5

ICPOUT + N, ICPOUT – N

–8

–2.0

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

CPOUT + / CPOUT – VOLTAGE (V)

Figure 12. Differential Charge Pump Output Compliance Range and

Charge Pump Mismatch with VP1 = VP2 = 5 V

ADF4193

5

DCS1800 Tx SETUP, 60kHz LOOP BW.

MEASURED ON EVAL-ADF4193-EB1

EVALUATION BOARD.

TIMERS: ICP = 28, SW1/SW2, SW3 = 35.

4

FREQUENCY LOCK IN WIDE BW MODE @ 5µs.

3

CPOUT–

2

VTUNE

1

CPOUT+

0

–1 0 1 2 3 4 5 6 7 8 9

TIME (µs)

Figure 13. VTUNE Settling Transient for a 75 MHz Jump Down from 1893 MHz to

1818 MHz, the Bottom of the Allowed Tuning Range with the Sirenza 1843T VCO

50

DCS1800 Tx SETUP, 60kHz LOOP BW.

40

MEASURED ON EVAL-ADF4193-EB1

EVALUATION BOARD WITH AD8302

PHASE DETECTOR.

30

TIMERS: ICP = 28, SW1/SW2, SW3 = 35.

+25°C PEAK PHASE ERROR < 5° @ 19.2µs

20

10

0

–10

–40°C +85°C

–20

–30

–40

–50

–5 0

5 10 15 20 25 30 35 40 45

TIME (µs)

Figure 14. Phase Settling Transient for a 75 MHz Jump from 1893 MHz to

1818 MHz (VTUNE = 3.7 V to 1.8 V with Sirenza 1843T VCO)

5

VP1 = VP2 = 5V

VP3 = 5.5V

VCMR = 3.3V

AOUT (= VTUNE)

4

3

CPOUT+ (= AIN+)

2

1

CPOUT– (= AIN–)

0

1780

1800

1820

1840 1860 1880 1900

FREQUENCY (MHz)

1920

1940

Figure 15. Tuning Range with a Sirenza 1843T VCO and a 5.5 V Differential

Amplifier Power Supply Voltage

Rev. F | Page 9 of 32

Share Link: