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APU3046

DUAL SYNCHRONOUS PWM CONTROLLER WITH CURRENT SHARING CIRCUITRY AND LDO CONTROLLER

Advanced Power Electronics Corp 

APU3046

PARAMETER

Soft-Start Section

Charge Current

Power Good Section

Fb1 Lower Trip Point

Fb1 Upper Trip Point

Fb2 Lower Trip Point

Fb2 Upper Trip Point

Fb3 Lower Trip Point

Fb3 Upper Trip Point

Power Good Voltage OK

Error Amp Section

Fb Voltage Input Bias Current

Fb Voltage Input Bias Current

Transconductance 1

Transconductance 2

Input Offset Voltage for PWM2

Oscillator Section

Frequency

Ramp Amplitude

Output Drivers Section

Rise Time

Fall Time

Dead Band Time

Max Duty Cycle

Min Duty Cycle

LDO Controller Section

Drive Current

Fb Voltage

Input Bias Current

SYM

TEST CONDITION

SSIB SS=0V

PGFB1L

PGFB1H

PGFB2L

PGFB2H

PGFB3L

PGFB3H

VPG

Fb1 Ramping Down

Fb1 Ramping Up

Fb2 Ramping Down

Fb2 Ramping Up

Fb3 Ramping Down

Fb3 Ramping Up

5K resistor pulled up to 5V

IFB1

IFB2

gm1

gm2

VOS(ERR)2

SS=3V

SS=0V

Fb2 to VP2

Freq

VRAMP

Rt=Open

Rt=Gnd

Tr

CL=1500pF

Tf

CL=1500pF

TDB

TON

Fb=1V, Freq=200KHz

TOFF

Fb=1.5V

ILDO

VFBLDO

ILDO(BIAS)

MIN TYP MAX UNITS

15

25

30

mA

0.9VREF

V

1.1VREF

V

0.9VREF

V

1.1VREF

V

0.9VREF

V

1.1VREF

V

4.5 4.8

5

V

-0.1

mA

-64

mA

400

mmho

600

mmho

-2

0

+2 mV

180 200 220 KHz

300 350 450

1.25

V

35 100 ns

50 100 ns

50 150 250 ns

85

90

%

0

0

%

30

45

mA

1.225 1.25 1.275 V

0.5

2

mA

PIN DESCRIPTIONS

PIN#

1

2

3

21

4

5,6

7

8

9

16

PIN SYMBOL

VREF

Vp2

Fb2

Fb1

Vcc

Comp1, Comp2

Rt

Sync

VcH2

VcH1

PIN DESCRIPTION

Reference Voltage.

Non-inverting input to the second error amplifier. In the current sharing mode, it is con-

nected to the programming resistor. In independent 2-channel mode it is connected to

VREF pin when Fb2 is connected to the resistor divider to set the output voltage.

Inverting inputs to the error amplifiers. In current sharing mode, Fb1 is connected to a

resistor divider to set the output voltage and Fb2 is connected to programming resistor to

achieve current sharing. In independent 2-channel mode, these pins work as feedback

inputs for each channel.

Supply voltage for the internal blocks of the IC.

Compensation pins for the error amplifiers.

The switching frequency can be programmed between 200KHz and 400KHz by connect-

ing a resistor between Rt and Gnd. By floating the pin, the switching frequency will be

200KHz and by grounding the pin, the switching frequency will be 400KHz.

The internal oscillator may be synchronized to an external clock via this pin.

Supply voltage for the high side output drivers. These are connected to voltages that must

be at least 4V higher than their bus voltages (assuming 5V threshold MOSFET). A mini-

mum of 1mF, high frequency capacitor must be connected from these pins to PGnd to

provide peak drive current capability.

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