APW7067N Ver la hoja de datos (PDF) - Anpec Electronics
Número de pieza
componentes Descripción
Lista de partido
APW7067N Datasheet PDF : 24 Pages
| |||
APW7067N
Application Information (Cont.)
PWM Compensation (Cont.)
FLC
-40dB/dec
FESR
-20dB/dec
The poles and zeros of the transfer function are:
FZ1
=
1
2 × π × R2 × C2
FZ2
=
2×
π×
1
(R1+ R3)× C3
FP1
=
1
2 × π × R2 ×
C1×
C1+
C2
C2
FP2
=
1
2 × π × R3 × C3
C1
R3 C3
R2 C2
Frequency(Hz)
Figure 7. The LC Filter GAIN and Frequency
The PWM modulator is shown in Figure 8. The input is
the output of the error amplifier and the output is the PHASE
node. The transfer function of the PWM modulator is given
by:
GAINPWM
=
VIN
∆VOSC
VIN1
ΔVOSC
OSC
PWM
Comparator
Driver
Output of
Error Amplifier
PHASE
Driver
Figure 8. The PWM Modulator
The compensation network is shown in Figure 9. It
provides a close loop transfer function with the highest
zero crossover frequency and sufficient phase margin.
The transfer function of error amplifier is given by:
1 //R2 + 1
GAINAMP
=
VCOMP
VOUT1
=
sC1
R1//R3 +
sC2
1
sC3
=
R1+ R3
×
s
+
1
R2 × C2
×
s
+
(R1+
1
R3)×
C3
R1× R3 × C1
s s
+
C1+ C2
R2 × C1× C2
×
s
+
R3
1
× C3
VOUT1
R1
FB
VCOMP
VREF
Figure 9. Compensation Network
The closed loop gain of the converter can be written as:
GAINLC X GAINPWM X GAINAMP
Figure 10. shows the asymptotic plot of the closed loop
converter gain, and the following guidelines will help to
design the compensation network. Using the below
guidelines should give a compensation similar to the
curve plotted. A stable closed loop has a -20dB/ decade
slope and a phase margin greater than 45 degree.
1. Choose a value for R1, usually between 1K and 5K.
2. Select the desired zero crossover frequency
FO: (1/5 ~ 1/10) X FS >FO>FESR
Use the following equation to calculate R2:
R2 = ∆VOSC × FO × R1
VIN FLC
3. Place the first zero F before the output LC filter double
Z1
pole frequency F .
LC
FZ1 = 0.75 X FLC
Calculate the C2 by the equation:
C2 =
1
2 × π × R2 × FLC × 0.75
4. Set the pole at the ESR zero frequency FESR:
FP1 = FESR
Calculate the C1 by the equation:
C1 =
C2
2 × π × R2 × C2 × FESR − 1
Copyright © ANPEC Electronics Corp.
15
Rev. A.3 - Mar., 2008
www.anpec.com.tw
Share Link: 