CS4385-DQZ(2004) Ver la hoja de datos (PDF) - Cirrus Logic

Número de pieza

componentes Descripción

Lista de partido

CS4385-DQZ
(Rev.:2004)

114 dB, 192 kHz 8-Channel D/A Converter

Cirrus Logic 

CS4385

SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT

(Inputs: Logic 0 = GND, Logic 1 = VLC, CL = 30 pF)

Parameter

Symbol

Min

Max

CCLK Clock Frequency

fsclk

-

6

RST Rising Edge to CS Falling

tsrs

500

-

CCLK Edge to CS Falling

(Note 17)

tspi

500

-

CS High Time Between Transmissions

tcsh

1.0

-

CS Falling to CCLK Edge

tcss

20

-

CCLK Low Time

tscl

66

-

CCLK High Time

tsch

66

-

CDIN to CCLK Rising Setup Time

tdsu

40

-

CCLK Rising to DATA Hold Time

(Note 18)

tdh

15

-

Rise Time of CCLK and CDIN

(Note 19)

tr2

-

100

Fall Time of CCLK and CDIN

(Note 19)

tf2

-

100

Unit

MHz

ns

ns

µs

ns

ns

ns

ns

ns

ns

ns

Notes: 17. tspi only needed before first falling edge of CS after RST rising edge. tspi = 0 at all other times.

18. Data must be held for sufficient time to bridge the transition time of CCLK.

19. For FSCK < 1 MHz.

RST

t srs

CS

t spi t css

t scl t sch

t csh

CCLK

t r2

t f2

C D IN

t dsu t dh

Figure 6. Control Port Timing - SPI Format

DS671A1

15

Share Link: