CS4385-DQZ(2004) Ver la hoja de datos (PDF) - Cirrus Logic
Número de pieza
componentes Descripción
Lista de partido
CS4385-DQZ Datasheet PDF : 56 Pages
| |||
CS4385
3. APPLICATIONS
The CS4385 serially accepts twos complement formatted PCM data at standard audio sample
rates including 48, 44.1 and 32 kHz in SSM, 96, 88.2 and 64 kHz in DSM, and 192, 176.4 and
128 kHz in QSM. Audio data is input via the serial data input pins (SDINx). The Left/Right Clock
(LRCK) determines which channel is currently being input on SDINx, and the Serial Clock
(SCLK) clocks audio data into the input data buffer.
The CS4385 can be configured in hardware mode by the M0, M1, M2 , M3 and M4 pins and in
software mode through I2C or SPI.
3.1 Master Clock
MCLK/LRCK must be an integer ratio as shown in Tables 1 - 3. The LRCK frequency is equal to
Fs, the frequency at which words for each channel are input to the device. The MCLK-to-LRCK
frequency ratio and speed mode is detected automatically during the initialization sequence by
counting the number of MCLK transitions during a single LRCK period and by detecting the ab-
solute speed of MCLK. Internal dividers are then set to generate the proper internal clocks. Ta-
bles 1 - 3 illustrate several standard audio sample rates and the required MCLK and LRCK
frequencies. Please note there is no required phase relationship, but MCLK, LRCK and SCLK
must be synchronous.
Sample Rate
(kHz)
32
44.1
48
Sample Rate
(kHz)
64
88.2
96
256x
8.1920
11.2896
12.2880
384x
12.2880
16.9344
18.4320
MCLK (MHz)
512x
768x
16.3840
24.5760
22.5792
33.8688
24.5760
36.8640
1024x
32.7680
45.1584
49.1520
Table 1. Single-Speed Mode Standard Frequencies
MCLK (MHz)
128x
192x
256x
384x
8.1920
12.2880
16.3840
24.5760
11.2896
16.9344
22.5792
33.8688
12.2880
18.4320
24.5760
36.8640
Table 2. Double-Speed Mode Standard Frequencies
1152x
36.8640
512x
32.7680
45.1584
49.1520
Sample Rate
(kHz)
176.4
192
64x
11.2896
12.2880
96x
16.9344
18.4320
MCLK (MHz)
128x
22.5792
24.5760
192x
33.8688
36.8640
256x
45.1584
49.1520
Table 3. Quad-Speed Mode Standard Frequencies
= Denotes clock ratio and sample rate combinations which are NOT supported under auto
speed-mode detection. Please see “Switching Characteristics - PCM” on page 12.
18
DS671A1
Share Link: 