CS4396-KS Ver la hoja de datos (PDF) - Cirrus Logic

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CS4396-KS

24-Bit, 192 kHz D/A Converter for Digital Audio

Cirrus Logic 

CS4396

TABLE OF FIGURES

Figure 1. Serial Audio Input Timing ........................................................................... 8

Figure 2. I2C Control Port Timing .............................................................................. 9

Figure 3. SPI Control Port Timing ........................................................................... 10

Figure 4. Typical Connection Diagram - Hardware Mode (Control Port Mode) ....... 11

Figure 5. Control Port Timing, I2C Mode ................................................................. 21

Figure 6. Control Port Timing, SPI mode ................................................................ 21

Figure 7. Single-speed Transition Band .................................................................. 23

Figure 8. Single-speed Stopband Rejection ............................................................ 23

Figure 9. Single-speed Transition Band .................................................................. 23

Figure 10.Single-speed Frequency Response ......................................................... 23

Figure 11.Double-speed Stopband .......................................................................... 23

Figure 12.Double-speed Transition Band ................................................................. 23

Figure 13.Double-speed Transition Band ................................................................. 23

Figure 14.Double-speed Frequency Response ........................................................ 23

Figure 15.Quad-speed Stopband Rejection ............................................................. 24

Figure 16.Quad-speed Transition Band ................................................................... 24

Figure 17.Quad-speed Transition Band ................................................................... 24

Figure 18.Quad-speed Frequency Response .......................................................... 24

Figure 19.De-Emphasis Curve ................................................................................. 24

Figure 20. Format 0, Left Justified ............................................................................ 25

Figure 21. Format 1, I2S .......................................................................................... 25

Figure 22. Format 2, Right Justified, 16-Bit Data ..................................................... 25

Figure 23.Format 3, Right Justified, 24-Bit Data ...................................................... 25

DS288PP1

3

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