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CS4396-KS Ver la hoja de datos (PDF) - Cirrus Logic

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CS4396-KS Datasheet PDF : 28 Pages
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CS4396
SWITCHING CHARACTERISTICS - CONTROL PORT
(TA = 25 °C; VD = 5.25 V to 3.0 Volts; Inputs: logic 0 = AGND, logic 1 = VD, CL = 30 pF)
Parameter
Symbol
Min
Max
Unit
I2C® Mode
SCL Clock Frequency
fscl
-
100
KHz
RST Rising Edge to Start
tirs
500
-
ns
Bus Free Time Between Transmissions
tbuf
4.7
-
µs
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
-
µs
Clock Low time
tlow
4.7
-
µs
Clock High Time
thigh
4.0
-
µs
Setup Time for Repeated Start Condition
tsust
4.7
-
µs
SDA Hold Time from SCL Falling
(Note 8)
thdd
0
-
µs
SDA Setup time to SCL Rising
tsud
250
-
ns
Rise Time of Both SDA and SCL Lines
tr
-
1
µs
Fall Time of Both SDA and SCL Lines
tf
-
300
ns
Setup Time for Stop Condition
tsusp
4.7
-
µs
Notes: 8. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
RST
t irs
Stop
Start
Repeated
Start
SDA
SCL
t buf
t hdst
t high
t hdst
tf
t
t
low
hdd
t sud
t sust
tr
Figure 2. I2C Control Port Timing
Stop
t susp
DS288PP1
9

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