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CL-PD6833
Cirrus-Logic
Cirrus Logic Cirrus-Logic
CL-PD6833 Datasheet PDF : 216 Pages
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CL-PD6833
PCI-to-CardBus Host Adapter
Table 2-2. Socket Interface Pins (cont.)
Pin Name1
Description2
Pin Number
Qty. I/O Pwr. Drive
Socket A Socket B
WP/
-IOIS16/
CCLKRUN#
Write Protect / I/O Is 16-Bit: In Memory
Card Interface mode, this input is inter-
preted as the status of the write protect
switch on the PC Card 16. In I/O Card
Interface mode, this input indicates the
size of the I/O data at the current address
125
on the PC Card 16.
In CardBus mode, this pin is the CardBus
CLKRUN# signal, which starts and stops
the CardBus clock (CCLK).
201
1
I/O-
PU
2 or 3
Card-
Bus
spec.
-INPACK/
CREQ#
I n p u t A ck n ow l e d g e : T h e - I N PAC K
function is not applicable in PCI bus
e nv i r o n m e n t s . T h i s p i n s h o u l d b e
connected to the PC Card socket’s
-INPACK pin, since this can be the DREQ
110
signal during DMA cycles.
In CardBus mode, this pin is the CardBus
REQ# signal.
186
1 I-PU 2 or 3 –
RDY/
-IREQ/
CINT#
Ready / Interrupt Request: In Memory
Card Interface mode, this input indicates
to the CL-PD6833 that the card is either
ready or busy. In I/O Card Interface mode,
this input indicates a card interrupt
91
request.
In CardBus mode, this pin is the CardBus
Interrupt Request signal. This signal is
active-low and level-sensitive.
167
1 I-PU 2 or 3 –
-WAIT/
CSERR#
Wait: This input indicates a request by the
card, to the CL-PD6833, to halt the cycle
in progress until this signal is deactivated.
108
In CardBus mode, this pin is the CardBus
SERR# signal.
184
1 I-PU 2 or 3 –
-CD[2:1]/
CCD[2:1]#
Card Detect: These inputs indicate to the
CL-PD6833 that a card is in the socket.
They are internally pulled high to the volt-
age of the +5V power pin.
126, 61
202, 136
2 I-PU
1
In CardBus mode, these inputs are used
in conjunction with CVS[2:1] to detect the
presence and type of card.
1 To differentiate the sockets in the pin diagram, all socket-specific pins have either A_ or B_ prepended to the pin names indi-
cated. For example, A_A[25:0] and B_A[25:0] are the independent address buses to the sockets.
2 When a socket is configured as an ATA drive interface, socket interface pin functions change. See Chapter 14.
18
PIN INFORMATION
ADVANCE DATA BOOK v0.3
June 1998

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