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CMX625 Ver la hoja de datos (PDF) - CML Microsystems Plc

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CMX625
CML
CML Microsystems Plc CML
CMX625 Datasheet PDF : 34 Pages
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ISDN TA POTS Interface
CMX625
1.5.10 SPM Generator
This block operates independently and has its own output pin. It can transmit 12kHz or 16kHz and is
controlled by bit 4 of the SETUP Register. Bit 7 of the MODE Register is used to enable or disable this
block. The signal has a rise and fall time each of about 4ms. The SPM signal rises from the bias level to
0dBm in 16 steps of 2dB magnitude, and falls from 0dBm to bias level in 16 steps of 2dB magnitude.
1.5.11 Transmit Signal Control
This block adjusts the amplitude of the FSK transmit signal output level, the level skew between DTMF
tones and the signal routing to the output ports.
Output signal levels are proportional to VDD. The nominal output signal levels (at 0dB attenuation and VDD
= 5.0V) are:
Single Tone
Dual Tone (per tone)
DTMF High Frequency Tone
DTMF Low Frequency Tone
FSK Signal
0dBm
-3dBm
-3dBm
-5dBm
0dBm
The level attenuator provides for level adjustment from 0dB to -14dB in -2dB steps. The typical level is
determined by bits 2 to 4 of the MODE Register as shown in the table below:
MODE Register
Bit 4 Bit 3 Bit 2
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Signal Level Adjustment
(dB)
0
-2
-4
-6
-8
-10
-12
-14
The RING signal is a square, trapezoidal or sinusoidal wave. The square and trapezoidal wave have an
amplitude of VDD peak to peak and the sinusoidal wave has an amplitude of ½ VDD peak to peak. The
trapezoidal ringing waveform has a crest factor (CF) of 1.35. Bits 2 and 3 of the SETUP Register select
the waveform type as shown in the table below.
SETUP Register
Bit 3
Bit 2
0
0
0
1
1
0
RING Signal Select
Square wave
Trapezoidal wave
Sinusoidal wave
2001 Consumer Microcircuits Limited
17
D/625/2

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