CMX625 Ver la hoja de datos (PDF) - CML Microsystems Plc
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CMX625 Datasheet PDF : 34 Pages
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ISDN TA POTS Interface
CMX625
1.5.13 DTMF Tone Decoder
This block is enabled or disabled by bit 5 of the SETUP Register. If disabled, bit 4 and 5 of the STATUS
Register and bit 0 to bit 3 of the DTMF RX DATA Register are set to ‘0’ and no interrupts are generated.
When bit 5 of the SETUP Register is enabled and bit 4 of the INTERRUPT MASK Register is set to ‘1’ (i.e.
unmasked) a ‘detected tone’ generates an interrupt and bit 4 of the STATUS Register is set to ‘1’.
Reading the STATUS Register clears the IRQN output.
When bit 5 of the SETUP Register is enabled and bit 5 of the INTERRUPT MASK Register is unmasked
(logic ‘1’), a ‘status change’ of the decoder will generate an interrupt and bit 5 of the STATUS Register will
be set to ‘1’. The validity of the data is indicated by bit 4 of the STATUS Register. The decode truth table
is shown below. Reading the STATUS Register clears the IRQN output. An interrupt is not generated
when ‘no tone’ is detected.
DTMF RX DATA Register Bits 0 - 3
Bit 3
Bit 2
Bit 1
Bit 0
(D3)
(D2)
(D1)
(D0)
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
DTMF Tone Pairs
Lower Frequency Upper Frequency
(Hz)
(Hz)
941
1633
697
1209
697
1336
697
1477
770
1209
770
1336
770
1477
852
1209
852
1336
852
1477
941
1336
941
1209
941
1477
697
1633
770
1633
852
1633
Keypad
Legend
D
1
2
3
4
5
6
7
8
9
0
*
#
A
B
C
A status change of the decoder and the generation of an interrupt (when the INTERRUPT MASK Register
bit 5 is unmasked) will occur both when a tone is first decoded and also when a tone, which was previously
present, is no longer decoded. In the latter case, bit 4 of the STATUS Register will be set to ‘0’ to indicate
that no tone was detected.
The decoded tone pair is indicated by bits 0-3 in the DTMF RX DATA Register.
2001 Consumer Microcircuits Limited
19
D/625/2
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