CS5331A Ver la hoja de datos (PDF) - Cirrus Logic
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CS5331A Datasheet PDF : 16 Pages
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CS5330A/31A
SWITCHING CHARACTERISTICS
(Inputs: Logic 0 = 0V, Logic 1 = VA+; CL = 20 pF) Switching characteristics are guaranteed by characterization.
Parameter
Symbol Min
Typ
Max Unit
Output Sample Rate
MCLK Period
MCLK Low
MCLK High
MCLK Period
MCLK Low
MCLK High
MCLK Period
MCLK Low
MCLK High
Fs
2
MCLK/LRCK = 256 tclkw
78
MCLK/LRCK = 256 tclkl
31
MCLK/LRCK = 256 tclkh
31
MCLK/LRCK = 384 tclkw
52
MCLK/LRCK = 384 tclkl
20
MCLK/LRCK = 384 tclkh
20
MCLK/LRCK = 512 tclkw
39
MCLK/LRCK = 512 tclkl
13
MCLK/LRCK = 512 tclkh
13
-
50
kHz
-
1000
ns
-
1000
ns
-
1000
ns
-
1000
ns
-
1000
ns
-
1000
ns
-
1000
ns
-
1000
ns
-
1000
ns
MASTER MODE
SCLK falling to LRCK
SCLK falling to SDATA valid
tmslr
-10
-
10
ns
tsdo
-10
-
35
ns
SCLK Duty cycle
-
50
-
%
SLAVE MODE
LRCK duty cycle
SCLK Period
SCLK Pulse Width Low
SCLK Pulse Width High
SCLK falling to SDATA valid
LRCK edge to MSB valid
SCLK rising to LRCK edge delay
LRCK edge to rising SCLK setup time
25
50
75
%
tclkw
(Note 9)
-
-
ns
tclkl
(Note 10)
-
-
ns
tclkh
20
-
-
ns
tdss
-
-
(Note 11) ns
tlrdss
-
-
(Note 11) ns
tslr1
20
-
-
ns
tslr2
(Note 11)
-
-
ns
9. 1
64 Fs
10.
1
128 Fs
- 15 ns
11.
1
256 Fs
+ 5 ns
DS138F5
7
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