CY8C20224 Ver la hoja de datos (PDF) - Cypress Semiconductor
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Lista de partido
CY8C20224 Datasheet PDF : 41 Pages
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24-pin Part Pinout
CY8C20224, CY8C20324
CY8C20424, CY8C20524
Figure 4. CY8C20324 24-pin PSoC Device
AI, P2[5]
AI, P2[3]
AI, P2[1]
AI, I2C SCL, SPI SS, P1[7]
AI, I2C SDA, SPI MISO, P1[5]
AI, SPI CLK, P1[3]
1
18
2
17
3 QFN 16
4 (Top View) 15
5
14
6
13
P0[4], AI
P0[2], AI
P0[0], AI
P2[0], AI
XRES
P1[6], AI
Table 2. 24-pin Part Pinout (QFN [2])
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
CP
Digital
I/O
I/O
I/O
IOH
IOH
IOH
IOH
Analog
I
I
I
I
I
I
I
Power
IOH
I
IOH
I
IOH
I
IOH
I
Input
I/O
I
I/O
I
I/O
I
I/O
I
I/O
I
Power
I/O
I
I/O
I
I/O
I
I/O
I
Power
Name
P2[5]
P2[3]
P2[1]
P1[7]
P1[5]
P1[3]
P1[1]
NC
VSS
P1[0]
P1[2]
P1[4]
P1[6]
XRES
P2[0]
P0[0]
P0[2]
P0[4]
P0[6]
VDD
P0[7]
P0[5]
P0[3]
P0[1]
Vss
Description
I2C SCL, SPI SS
I2C SDA, SPI MISO
SPI CLK
CLK[3], I2C SCL, SPI MOSI
No connection
Ground connection
DATA[3], I2C SDA
Optional external clock input (EXTCLK)
Active high external reset with internal pull-down
Supply voltage
Integrating input
Integrating input
Center pad is connected to ground
A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive
Notes
2. The center pad on the QFN package is connected to ground (VSS) for best mechanical, thermal, and electrical performance. If not connected to ground, it is electrically
floated and not connected to any other signal.
3. These are the ISSP pins, that are not high Z at POR (Power on reset). Refer the PSoC Programmable System-on-Chip Technical Reference Manual for details.
Document Number: 001-41947 Rev. *L
Page 8 of 41
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