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DM9106 Ver la hoja de datos (PDF) - Davicom Semiconductor, Inc.

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DM9106 Datasheet PDF : 92 Pages
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DM9106
3-port switch with PCI Interface
6.2.27 Port-based VLAN mapping table register 1 (CR25) .......................................................................... 43
6.2.28 Port-based VLAN mapping table register 2 (CR26) .......................................................................... 43
6.2.29 Port-based VLAN mapping table register 3 (CR27) .......................................................................... 43
6.2.30 TOS Priority Map Register 0 (CR28) ................................................................................................. 43
6.2.31 TOS Priority Map Register 1 (CR29) ................................................................................................. 44
6.2.32 TOS Priority Map Register 2 (CR30) ................................................................................................. 44
6.2.33 TOS Priority Map Register 3 (CR31) ................................................................................................. 45
6.3 DESCRIPTOR LIST.......................................................................................................................................... 45
6.3.1 Receive Descriptor Format .................................................................................................................. 45
6.3.1.1 Receive Status Register (RDES0) ................................................................................................. 46
6.3.1.2 Receive Descriptor Control and Buffer Size Register (RDES1) .................................................... 46
6.3.1.3 Buffer Starting Address Register (RDES2) .................................................................................... 46
6.3.1.4 Next descriptor Address Register (RDES3)................................................................................... 46
6.3.2 Transmit Descriptor Format ................................................................................................................. 47
6.3.2.1 Transmit Status Register (TDES0)................................................................................................. 47
6.3.2.2 Transmit buffer control and buffer size Register (TDES1)............................................................. 47
6.3.2.3 Next descriptor Address Register (TDES3) ................................................................................... 48
7. PCI MODE EEPROM FORMAT ..................................................................................... 49
8. PHY REGISTERS .......................................................................................................... 52
8.1 BASIC MODE CONTROL REGISTER (BMCR) – 00H......................................................................................... 53
8.2 BASIC MODE STATUS REGISTER (BMSR) – 01H............................................................................................ 54
8.3 PHY ID IDENTIFIER REGISTER #1 (PHYID1) – 02H ........................................................................................ 55
8.4 PHY ID IDENTIFIER REGISTER #2 (PHYID2) – 03H ........................................................................................ 55
8.5 AUTO-NEGOTIATION ADVERTISEMENT REGISTER (ANAR) – 04H .................................................................... 56
8.6 AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER (ANLPAR) – 05H ...................................................... 57
8.7 AUTO-NEGOTIATION EXPANSION REGISTER (ANER)- 06H .............................................................................. 58
8.8 DAVICOM SPECIFIED CONFIGURATION REGISTER (DSCR) – 10H ................................................................. 58
8.9 DAVICOM SPECIFIED CONFIGURATION AND STATUS REGISTER (DSCSR) – 11H ........................................... 60
8.10 10BASE-T CONFIGURATION/STATUS (10BTCSR) – 12H ............................................................................ 61
8.11 POWER DOWN CONTROL REGISTER (PWDOR) – 13H.................................................................................. 62
8.12 (SPECIFIED CONFIG) REGISTER – 14H .......................................................................................................... 62
8.13 DAVICOM SPECIFIED RECEIVE ERROR COUNTER REGISTER (RECR) – 16H................................................ 63
8.14 DAVICOM SPECIFIED DISCONNECT COUNTER REGISTER (DISCR) – 17H.................................................... 63
4
Preliminary datasheet
DM9106-DS-P01
July 9, 2009

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