DS2187 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

Número de pieza

componentes Descripción

Lista de partido

DS2187

Receive Line Interface

Dallas Semiconductor -> Maxim Integrated 

PIN DESCRIPTION Table 1

DS2187

PIN

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

SYMBOL

AVDD

RAIS

ZCSEN

LCAP

RCLKSEL

RTIP

RRING

LOCK

AVSS

DVSS

RCLK

RNEG

RPOS

NC

BPV

AIS

RCL

DVDD

TYPE

-

I

I

-

I

I

O

-

-

O

O

-

O

O

O

-

DESCRIPTION

Analog Positive Supply. 5.0 volts.

Reset Alarm Indication Signal. Every other low pulse at this input

establishes the AIS alarm detection period.

0 Code Suppression Enable. When high, incoming B8ZS (RCLKSEL=0)

or HDB3 (RCLKSEL=1) code words are replaced with all 0s at RPOS and

RNEG; when low, no code replacement occurs.

Loop Cap. Part of internal loop filter; attach a 10 microfarad capacitor from

this pin to VSS.

Receive Clock Select. Tie to VSS for 1.544 MHz (T1) applications, to VDD for

2.048 MHz (CEPT) applications.

Receive Tip and Ring. Connect to line transformer as shown in Figure 2.

Frequency Lock. High state indicates that internal circuitry is phase- and

frequency-locked to the incoming signal at RRING and RTIP.

Analog Signal Ground. 0.0 volts.

Digital Signal Ground. 0.0 volts.

Receive Clock. Extracted line rate clock.

Receive Data. Extracted receive data; updated on rising edge of RCLK.

No Connect. Do not connect to this pin.

Bipolar Violation. Transitions high for the full bit period when a bit in

violation appears at RPOS or RNEG; B8ZS code words are not accused when

ZCSEN=1. BPV not valid for RCLKSEL=1 and ZCSEN=1.

Alarm Indication Signal. High when the received data stream has contained

less than three 0s during the last two periods of the RAIS signal.

Receive Carrier Loss. High if 192 0s appear at RPOS and RNEG; reset on

next occurrence of a one.

Digital Positive Supply. 5.0 volts

3 of 10

Share Link: