DS2187 Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2187

Receive Line Interface

Dallas Semiconductor -> Maxim Integrated 

NOTES:

1. T1 applications (RCLKSEL=0).

DS2187

2. CEPT applications (RCLKSEL=1).

3. Minimum and maximum limits shown reflect changes in DPLL divide ratio as required to track jitter.

AC TIMING DIAGRAM Figure 4

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