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EM78808

8-BIT MICRO-CONTROLLER

ELAN Microelectronics 

VII.Functional Descriptions

VII.1 Operational Registers

EM78808

8-bit Micro-controller

ADDRESS

00 R0

REGISTER

(PAGE0)

REGISTER

(PAGE1)

CONTROL REGISTER

(PAGE0)

01 R1(TCC buffer)

02 R2(PC)

03 R3(STATUS)

R3(7)

04

05

06

07

08

09

0A

0B

0C

0D

0E

0F

10

:

1F

20

:

R4(7,6) 3F

R4(RSR, BANK SELECT

R5(PORT57..PORT55

Program ROM PAGE)

R6(PORT6)

R7(PORT7)

R8(PORT8)

R9(PORT9)

RA(CPU MODE,CLOCK,

FSK,WDT control)

RB(PORTB)

RC(PORTC)

RD(Comparator control)

RE(Key scan , LCD control)

RF(Interrupt flag)

R4(SPI status and control

R5(SPI data buffer)

R6 (DATA ROM data buffer)

R7(DATA ROM address

address7 .. address 0)

R8(DATA ROM address

address 15 .. address 8)

R9(EDD,LCDA8,DATA ROM

address 17 .. address 16

RA(LCD RAM address)

RB (LCD RAM data buffer)

RC(DATA RAM data buffer)

RD(DATA RAM address

address 7 .. address 0)

RE( Energy Detector control

,DATA RAM address

address 12 .. address 8)

IO C 5 ( IO C 5 5 ,5 6 ,5 7 ,P 8 S ,

P9S,PBS,PCS)

IOC6(PORT6 IO control)

IOC7 (PORT7 IO control)

IOC8 (PORT8 IO control)

IOC9 (PORT9 IO control

IO C A (C O U N T E R 1 ,2 ,

prescaler and source)

IOCB(PORTB IO control)

IOCC(PORTC IO control)

IOCD(COUNTER1 PRESET)

IOCE(COUNTER2 PRESET)

IOCF(Interrupt control)

16 byte COMMON

REGISTER

BANK0 , BANK1, BANK2 ,BANK3

32X8 32X8 32X8 32X8

COMMOM REGISTER

LCD RAM

RA PAGE1 => address

RB PAGE1 =>data

DATA RAM

RD PAGE1 => address7..0

RE PAGE1 => address12..8

RC PAGE1 =>data

CONTROL REGISTER

(PAGE1)

R3(5,6)

IOC5(Key tone, LCD bias control)

IOC6 (current DA)

IOC7(key strobe , seg7 .. seg0)

IOC8(key strobe, seg15.. seg8)

IOC9(DTMF receiver control)

IOCA(PORT7 pull high)

IOCB(PORT6 pull high)

IOCC(Tone1)

IO C D (T one2)

IOCE(OP control)

CONTROL REGISTER

(PAGE2)

R3(5,6)

IOC5 ( Stack Pointer )

IOC6 (Port s/w, LCDDV, CDAL)

IOCE (Energy Detector)

Fig.4 control register configuration

VII.2 Operational Register Detail Description

R0 (Indirect Addressing Register)

R0 is not a physically implemented register. It is useful as indirect addressing pointer. Any instruction using R0

as register actually accesses data pointed by the RAM Select Register (R4).

Example:

Mov a,@0x20 ;store a address at R4 for indirect addressing

Mov 0x04,A

Mov a,@0xAA ;write data 0xAA to R20 at bank0 through R0

Mov 0x00,A

______________________________________________________________________________________________________________________________________________________

* This specification is subject to change without notice.

8/1/2004 (V3.1)

12

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