FM24C16B Ver la hoja de datos (PDF) - Unspecified
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FM24C16B Datasheet PDF : 12 Pages
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FM24C16B - 16Kb 5V I2C F-RAM
AC Parameters (TA = -40 C to + 85 C, VDD = 4.5V to 5.5V unless otherwise specified)
Symbol Parameter
Min Max Min Max Min
fSCL
tLOW
tHIGH
tAA
SCL Clock Frequency
Clock Low Period
Clock High Period
SCL Low to SDA Data Out Valid
0 100 0 400 0
4.7
1.3
0.6
4.0
0.6
0.4
3
0.9
Max
1000
0.55
Units
kHz
s
s
s
tBUF
Bus Free Before New Transmission 4.7
1.3
0.5
s
tHD:STA Start Condition Hold Time
4.0
0.6
0.25
s
tSU:STA Start Condition Setup for Repeated 4.7
0.6
0.25
s
Start
tHD:DAT Data In Hold Time
0
0
0
ns
tSU:DAT Data In Setup Time
250
100
100
ns
tR
Input Rise Time
1000
300
300 ns
tF
Input Fall Time
300
300
100 ns
tSU:STO Stop Condition Setup
4.0
0.6
0.25
s
tDH
Data Output Hold
(from SCL @ VIL)
0
0
0
ns
tSP
Noise Suppression Time Constant
on SCL, SDA
50
50
50 ns
Notes : All SCL specifications as well as start and stop conditions apply to both read and write operations.
1 The speed-related specifications are guaranteed characteristic points from DC to 1 MHz.
2 This parameter is periodically sampled and not 100% tested.
Notes
1
2
2
Capacitance (TA = 25 C, f=1.0 MHz, VDD = 5V)
Symbol
Parameter
CI/O
Input/Output Capacitance (SDA)
CIN
Input Capacitance
Max
8
6
Notes
1 This parameter is periodically sampled and not 100% tested.
Units
pF
pF
Notes
1
1
Power Cycle Timing
VDD
VDD min.
tVR
tPU
tVF
tPD
SDA,SCL
Power Cycle Timing (TA = -40C to +85C, VDD = 4.5V to 5.5V unless otherwise specified)
Symbol Parameter
Min
Max
tPU
Power Up (VDD min) to First Access (Start condition)
10
-
tPD
Last Access (Stop condition) to Power Down (VDD min)
0
-
tVR
VDD Rise Time
30
-
tVF
VDD Fall Time
100
-
Notes
1. Slope measured at any point on VDD waveform.
Units
ms
s
s/V
s/V
Notes
1
1
Rev. 1.3
July 2011
Page 9 of 12
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