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HB52RD649DC Ver la hoja de datos (PDF) - Elpida Memory, Inc

Número de pieza
componentes Descripción
Lista de partido
HB52RD649DC
Elpida
Elpida Memory, Inc Elpida
HB52RD649DC Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
HB52RF649DC-B, HB52RD649DC-B
Pin Capacitance (TA = 25°C, VCC = 3.3V ± 0.3V)
Parameter
Symbol
Pins
max.
Unit
Notes
Input capacitance
CIN
Address
110
pF
1, 2, 4
Input capacitance
CIN
/RE, /CE, /W,
110
pF
1, 2, 4
Input capacitance
CIN
/S0, /S1, CK0, CK1,
CKE0, CKE1
65
pF
1, 2, 4
Input capacitance
CIN
DQMB
30
pF
1, 2, 4
Input/Output capacitance
CI/O
DQ, CB
27
pF
1, 2, 3, 4
Notes: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. Measurement condition: f = 1MHz, 1.4V bias, 200mV swing.
3. DQMB = VIH to disable Data-out.
4. This parameter is sampled and not 100% tested.
AC Characteristics (TA = 0 to 65°C, VCC = 3.3V ± 0.3V, VSS = 0V)
-75
Parameter
System clock cycle time
(CL = 2)
(CL = 3)
PC100
Symbol Symbol min.
tCK
Tclk
10
tCK
Tclk
7.5
CK high pulse width
tCKH Tch
2.5
CK low pulse width
Access time from CK
(CL = 2)
(CL = 3)
tCKL
Tcl
2.5
tAC
Tac
tAC
Tac
Data-out hold time
tOH
Toh
2.7
CK to Data-out low impedance tLZ
2
CK to Data-out high impedance tHZ
Input setup time
tAS,
tDS,
tCS,
tCES
Tsi
1.5
CKE setup time for power down
exit
tCESP
Tpde
1.5
tAH, tCH,
Input hold time
tDH,
Thi
0.8
tCEH
Ref/Active to Ref/Active
command period
tRC
Trc
67.5
Active to Precharge command
period
tRAS
Tras
45
Active command to column
command (same bank)
tRCD Trcd
20
Precharge to active command
period
tRP
Trp
20
Write recovery or data-in to
precharge lead time
tDPL
Tdpl
15
Active (a) to Active (b)
command period
tRRD Trrd
15
Transition time (rise and fall) tT
1
Refresh period
tREF
-A6
max. min.
10
10
3
3
6
5.4
3
2
5.4
2
2
1
70
120000 50
20
20
20
20
5
1
64
max.
Unit
ns
ns
ns
ns
6
ns
6
ns
ns
ns
6
ns
ns
ns
ns
ns
120000 ns
ns
ns
ns
ns
5
ns
64
ms
Notes
1
1
1
1, 2
1, 2
1, 2, 3
1, 4
1, 5
1
1
1
1
1
1
1
1
Data Sheet E0223H30 (Ver. 3.0)
10

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