ICS9250-16 Ver la hoja de datos (PDF) - Integrated Circuit Systems
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ICS9250-16 Datasheet PDF : 17 Pages
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ICS9250-16
Absolute Maximum Ratings
Core Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . 4.6 V
I/O Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND 0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . 65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70C; Supply Voltage VDD = 3.3 V+/-5%, VDDL = 2.5 V+/-5% (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Input High Voltage
VIH
2
VDD+0.3 V
Input Low Voltage
VIL
VSS-0.3
0.8
V
Input High Current
IIH
VIN = VDD
-5
5
µA
Input Low Current
IIL1 VIN = 0 V; Inputs with no pull-up resistors
-5
2
µA
IIL2 VIN = 0 V; Inputs with pull-up resistors
-200 -100
IDD3.3OP
CL = 0 pF; Select @ 66 MHz
CL = 0 pF; Select @ 100 MHz
CL = 0 pF; Select @ 133 MHz
CL = Max loads; Select @ 66 MHz
CL = Max loads; Select @ 100 MHz
97 110
91 105
mA
100 130
275 310
267 300
mA
Operating Supply
Current
IDD2.5OP
CL = Max loads; Select @ 133 MHz
CL = 0 pF; Select @ 66 MHz
CL = 0 pF; Select @ 100 MHz
CL = 0 pF; Select @ 133 MHz
CL = Max loads; Select @ 66 MHz
CL = Max loads; Select @ 100 MHz
278 350
8
10
11 15
mA
13 20
22 70
31 100
mA
Powerdown Current
IDD3.3PD
IDD.25PD
CL = Max loads; Select @ 133 MHz
CL = Max loads
Input address VDD or GND
37 130
220 400
µA
<1 10
Input Frequency
Fi
VDD = 3.3 V
12 14.318 16 MHz
Pin Inductance
Lpin
7
nH
Input Capacitance1
CIN
COUT
Logic Inputs
Output pin capacitance
5
pF
6
pF
CINX X1 & X2 pins
27
Transition time1
Ttrans To 1st crossing of target frequency
Settling time1
Ts From1st crossing to 1% target frequency
Clk Stabilization1
TSTAB FromVDD = 3.3 Vto 1% target frequency
45
pF
5
ms
5
ms
5
ms
Delay1
tPZH,tPZL Output enable delay (all outputs)
tPHZ,tPLZ Output disable delay (all outputs)
1
10
ns
1
10
ns
1Guaranteed by design, not 100% tested in production.
8
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