IS41C16257-35K Ver la hoja de datos (PDF) - Integrated Silicon Solution
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IS41C16257-35K Datasheet PDF : 17 Pages
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IS41C16257
IS41LV16257
ISSI ®
ELECTRICAL CHARACTERISTICS(1) (Recommended Operation Conditions unless otherwise noted.)
Symbol Parameter
Test Condition
Speed Min. Max. Unit
IIL
Input Leakage Current
Any input 0V < VIN < Vcc
Other inputs not under test = 0V
–10 10 µA
IIO
Output Leakage Current
Output is disabled (Hi-Z)
0V < VOUT < Vcc
–10 10 µA
VOH
Output High Voltage Level
IOH = –2.5 mA
2.4 —
V
VOL
Output Low Voltage Level
IOL = 2.1 mA
—
0.4
V
ICC1
Stand-by Current: TTL
RAS, LCAS, UCAS ≥ VIH
Com. 5V —
2 mA
Ind. 5V
3
ICC1
Stand-by Current: TTL
RAS, LCAS, UCAS ≥ VIH
Com. 3.3V —
1 mA
Ind. 3.3V
2
ICC2
Stand-by Current: CMOS
RAS, LCAS, UCAS ≥ VCC – 0.2V
5V —
2 mA
ICC2
Stand-by Current: CMOS
RAS, LCAS, UCAS ≥ VCC – 0.2V
3.3V —
1 mA
ICC3
Operating Current:
RAS, LCAS, UCAS,
-35 — 230 mA
Random Read/Write(2,3,4)
Address Cycling, tRC = tRC (min.)
-60 — 170
Average Power Supply Current
ICC4
Operating Current:
RAS = VIL, LCAS, UCAS,
-35 — 220 mA
Fast Page Mode(2,3,4)
Cycling tPC = tPC (min.)
-60 — 160
Average Power Supply Current
ICC5
Refresh Current:
RAS-Only(2,3)
RAS Cycling, LCAS, UCAS ≥ VIH
tRC = tRC (min.)
-35 — 230 mA
-60 — 170
Average Power Supply Current
ICC6
Refresh Current:
RAS, LCAS, UCAS Cycling
-35 — 230 mA
CBR(2,3,5)
tRC = tRC (min.)
-60 — 170
Average Power Supply Current
Notes:
1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device
operation is assured.The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded.
2. Dependent on cycle rates.
3. Specified values are obtained with minimum cycle time and the output open.
4. Column-address is changed once each fast page cycle.
5. Enables on-chip refresh and address counters.
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
DR004-1B
05/24/99
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