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LTC1553CG

5-Bit Programmable Synchronous Switching Regulator Controller for Pentium® II Processor

Linear Technology 

LTC1553

APPLICATIONS INFORMATION

The LTC1553 designs that use a 5V VIN voltage and a

doubler charge pump to generate PVCC will not provide

enough drive voltage to fully enhance standard power

MOSFETs. Under this condition, the effective MOSFET

RDS(ON) may be quite high, raising the dissipation in the

FETs and reducing efficiency. Logic level FETs are a better

choice for 5V-only systems as shown in Figure 7 or 12V

input systems using the 17V charge pump of Figure 9.

They can be fully enhanced with the generated charge

pump voltage and will operate at maximum efficiency.

Note that doubler charge pump designs running from

supplies higher than 5V, and all tripler charge pump

designs, should include a Zener clamp diode at PVCC to

prevent transients from exceeding the absolute maximum

rating at that pin. See the MOSFET Gate Drive section for

more charge pump information.

Once the threshold voltage has been selected, RDS(ON)

should be chosen based on input and output voltage,

allowable power dissipation and maximum required out-

put current. In a typical LTC1553 buck converter circuit

the average inductor current is equal to the output load

current. This current is always flowing through either Q1

or Q2 with the power dissipation split up according to the

duty cycle:

( ) DC Q1 = VOUT

VIN

( ) ( ) DC Q2 = 1− VOUT = VIN − VOUT

VIN

VIN

The RDS(ON) required for a given conduction loss can now

be calculated by rearranging the relation P = I2R.

( ) ( ) RDS ON Q1 =

( ) ( ) PMAX Q1

=

VIN

PMAX

Q1





2

2

[ ( )]( ) ( )( ) DC Q1 IMAX

VOUT IMAX

( ) ( ) RDS ON Q2 =

( ) PMAX Q2

=

2

( ) VIN

PMAX

Q2





2

[ ( )]( ) ( )( ) DC Q2 IMAX

VIN − VOUT IMAX

PMAX should be calculated based primarily on required

efficiency or allowable thermal dissipation. A typical high

efficiency circuit designed for Pentium II with a 5V input

and a 2.8V, 11.2A output might allow no more than 4%

efficiency loss at full load for each MOSFET. Assuming

roughly 90% efficiency at this current level, this gives a

PMAX value of:

[(2.8)(11.2A/0.9)(0.04)] = 1.39W per FET

and a required RDS(ON) of:

( )( ) 5V 1.39W

( ) RDS ON Q1 =

= 0.019Ω

2

( )( ) 2.8V 11.2A

( )( ) 5V 1.39W

( ) RDS ON Q2 =

= 0.025Ω

2

( )( ) 5V − 2.8V 11.2A

Note also that while the required RDS(ON) values suggest

large MOSFETs, the dissipation numbers are only 1.39W

per device or less––large TO-220 packages and heat sinks

are not necessarily required in high efficiency applica-

tions. Siliconix Si4410DY or International Rectifier IRF7413

(both in SO-8) or Siliconix SUD50N03 or Motorola

MTD20N03HDL (both in D PAK) are small footprint sur-

face mount devices with RDS(ON) values below 0.03Ω at 5V

of gate drive that work well in LTC1553 circuits. With

higher output voltages, the RDS(ON) of Q1 may need to be

significantly lower than that for Q2. These conditions can

often be met by paralleling two MOSFETs for Q1 and using

a single device for Q2. Note that using a higher PMAX value

in the RDS(ON) calculations will generally decrease MOSFET

cost and circuit efficiency while increasing MOSFET heat

sink requirements.

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