LAN91C95 Ver la hoja de datos (PDF) - SMSC -> Microchip

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LAN91C95

ISA/PCMCIA Full Duplex Single-Chip Ethernet and Modem Controller with RAM

SMSC -> Microchip 

PIN NO.

NAME

83

Ready

nWait

59, 60,

61, 63,

65, 66,

68-70,

72-74,

76-79

98

Data Bus

Reset

82

Address

Latch

nWrite

Enable

90

Interrupt

nInterrupt

Request

91

Interrupt 1

DESCRIPTION OF PIN FUNCTIONS

SYMBOL

TYPE

DESCRIPTION

IOCHRDY

OD24 with ISA - Output. Optionally used by the

pullup

LAN91C95 to extend host cycles.

nWAIT

PCMCIA - Output. Optionally used by the

LAN91C95 to extend host cycles.

D0-D15

I/O24

Bidirectional. 16 bit data bus used to access

the LAN91C95 internal registers. The data bus

has weak internal pullups. Supports direct

connection to the system bus without external

buffering.

RESET

BALE

nWE

INTR0

nIREQ

INTR1

IS with

pullup

IS with

pullup

O24

O24

10

Input. Active high Reset. This input is not

considered active unless it is active for at least

100ns to filter narrow glitches. A POR circuit

generates an internal reset upon power up for

at least 15msec. All hardware reset references

in this spec relate to the OR function of the

POR and the RESET pin.

ISA - Input. Address strobe. For systems that

require address latching, the falling edge of

BALE latches address lines and nSBHE.

PCMCIA - Write Enable input. Used for writing

into COR and CSR registers as well as

attribute memory space.

ISA - Active high interrupt signal. The interrupt

line selection is determined by the value of INT

SEL1-0 bits in the Configuration Register. This

interrupt is tri-stated when not selected.

PCMCIA - Active low interrupt request output.

Pin acts as a Ready pin during power-up. The

pin should be pulled low within 10us of the

application of the VCC or Reset (which ever

occurs later). It remains low(0) until the CIS is

loaded in the Internal SRAM. The high(1)

state indicates to the host controller that the

device is ready.

ISA - Output. Active high interrupt signal. The

interrupt line selection is determined by the

value of INT SEL1-0 bits in the Configuration

Register. This interrupt is tri-stated when not

selected.

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