LAN91C95 Ver la hoja de datos (PDF) - SMSC -> Microchip
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LAN91C95 Datasheet PDF : 144 Pages
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WAKES UP
BY
PWRDWN
Pin deassertn
PWR
DWN
Pin
(A=Ass
rtd)
nA
nWAKEUP-
nA
EN Pin
deassertn -
AND- ECOR
Func. En. = 1,
ECSR
PWRDWN =
0, CTR
PWRDWN bit
=0
nA
By writing a 0
nA
to CTR
WAKEUP_EN
bit
nA
By writing 1
nA
to 0 to ECSR
Power Down,
a 0 to CTR
PWRDWN,
and a 0 to
WAKEUP_EN
bit
By writing 1 to
nA
ECOR Func
Enable, 0 to
ECSR Power
Down, 0 to
CTR
PWRDWN,
and 0 to
WAKEUP_EN
bit
By writing 0 to
nA
ECSR Power
Down bit*
By writing 0 to
nA
ECSR Power
Down and a 0
to CTR
PWRDWNbit
Table 7B - PCMCIA MODE (*Rev. C and Higher)
nWAKE
UP-EN
PIN
(A=Ass
rtd)
X
ECOR
FUNC
ENABLE
No
change
NEXT STATE
ECSR
PWR
DOWN
No
change
CTR
PWRDWN
BIT
No change
CTR
WAKE
UP_EN
BIT
No
change
MCOR
FUNC
ENABLE
No
change
nA
No
No
No change
No
-
change change
change
MCSR
PWR
DOWN
No
change
-
COMMENTS
Pin
deassertion
will make the
Att/Conf Mem
accessible
entirely
nA
1
0
0
0
-
-
Fully Awake
nA
1
0
0
0
-
-
MP
precedence
nA
0
X
X
0
-
-
nA
1
0
0
0
-
-
NOTE: Both
Power down
bits need to
be written as
0 only if both
were set to 1
nA
1
0
0
0
-
-
NOTE: Both
Power down
bits need to
be written as
0 only if both
were set to 1
nA
1
0
0
0
-
-
nA
1
0
0
0
-
-
NOTE: Both
Power down
bits need to
be written as
0 only if both
were set to 1
37
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