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LAN9215I

Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support

SMSC -> Microchip 

Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support

Datasheet

System Memory

Embedded

Microprocessor/

Microcontroller

System Bus

System Memory

System

Peripherals

LAN9215i

Optional

External

MII

PHY

Magnetics

Optional

Magnetics

Ethernet

LEDS/GPIO

1.1

25MHz

XTAL

EEPROM

(Optional)

Figure 1.1 System Block Diagram

The SMSC LAN9215i integrated 10/100 MAC/PHY controller is a peripheral chip that performs the

function of translating parallel data from a host controller into Ethernet packets. The LAN9215i Ethernet

MAC/PHY controller is designed and optimized to function in an embedded environment. All

communication is performed with programmed I/O transactions using the simple SRAM-like host

interface bus.

The diagram shown above, describes a typical system configuration of the LAN9215i in a typical

embedded environment.

The LAN9215i is a general purpose, platform independent, Ethernet controller. The LAN9215i consists

of four major functional blocks. The four blocks are:

„ 10/100 Ethernet PHY

„ 10/100 Ethernet MAC

„ RX/TX FIFOs

„ Host Bus Interface (HBI)

Compatibility with First-generation LAN9118 Family Devices

The LAN9215i is driver-, register-, and footprint-compatible with previous generation LAN9118 Family

devices. Drivers written for these products will work with the LAN9215i. However, in order to support

HP Auto-MDIX, other components such as the magnetics and the passive components around the

magnetics need to change, and supporting these changes does require a minor PCB change. A

reference design for the LAN9215i will be available on SMSC’s website.

SMSC LAN9215i

11

DATASHEET

Revision 1.93 (12-12-07)

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