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LPC47M172-NW

Advanced I/O Controller with Motherboard GLUE Logic

SMSC -> Microchip 

Advanced I/O Controller with Motherboard GLUE Logic

Datasheet

Note:

Pin 117 is used to select the mode of the logical device numbering. This pin affects the LD_NUM bit in the

TEST 7 register (configuration register 0x29), which is used to select logical device numbering in the

LPC47M172. See Table 6.1 - Super I/O Block Logical Device Number and Addresses. The pin functions

as follows:

ƒ The pin has an internal pull-down resistor that selects the non-standard SMSC (Intel Compatible) mode. To

select this mode, the pin should be left unconnected. This configuration clears the LD_NUM bit to ‘0’ and the

associated functionality corresponds to the existing functionality in the part when the LD_NUM bit=0.

ƒ Connecting this pin to VTR will select the standard SMSC mode of the logical device numbering. This

configuration sets the LD_NUM bit to ‘1’ and the associated functionality corresponds to the existing functionality

in the part when the LD_NUM bit=1.

SMSC/Non-SMSC Register Sets (Rev. 01-11-07)

Page 13

DATASHEET

SMSC LPC47M172

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