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LPC47M182-NW

Advanced I/O Controller with Motherboard GLUE Logic

SMSC -> Microchip 

Chapter 2 Pin Layout

Advanced I/O Controller with Motherboard GLUE Logic

Datasheet

MCLK

1

MDAT

2

KCLK

3

KDAT

4

GA20M

5

VCC

6

nKBDRST

7

VSS

8

nDSKCHG

9

nHDSEL 10

nRDATA 11

nWRTPRT 12

nTRK0 13

nWGATE 14

nWDATA 15

nSTEP 16

nDIR 17

nDS0 18

nMTR0 19

nINDEX 20

DRVDEN1 21

DRVDEN0 22

nDCD 23

nDSR 24

RXD 25

nRTS 26

TXD 27

nCTS 28

VSS 29

nDTR (XOR) 30

VCC 31

nRI 32

SLCT 33

PE 34

BUSY 35

nACK 36

PD7 37

PD6 38

LPC47M182

128 PIN QFP

102 nCDC_DWN_RST

101 nCDC_DWN_ENAB/GP24

100 nAUD_LINK_RST

99

nIO_PME

98

TEST_EN

97

F_CAP

96

VSS

95

YLW_LED

94

GRN_LED

93

VTR

92

nRSMRST

91

CLOCKI32

90

SMB_DAT_R

89

SMB_DAT_M

88

SMB_CLK_R

87

SMB_CLK_M

86

nSLP_S5

85

nSLP_S3

84

PWRGD_PLATFORM

83

nCPU_PRESENT

82

PWRGD_PS

81

nPS_ON

80

SCK_BJT_GATE

79

LATCHED_BF_CUT

78

VSS

77

nBACKFEED_CUT

76

VTR

75

nFPRST

74

nPCIRST_OUT2

73

nPCIRST_OUT

72

REF5V_STBY

71

V_5P0_STBY

70

REF5V

69

nSCSI

68

nSECONDARY_HD

67

nPRIMARY_HD

66

nHD_LED

65

CLOCKI

Note:

Figure 2.1 - LPC47M182 Pin Layout

Pin 117 is used to select the mode of the logical device numbering. This pin affects the LD_NUM bit in the

TEST 7 register (configuration register 0x29), which is used to select logical device numbering in the

LPC47M182. The pin functions as follows:

Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)

12

DATASHEET

SMSC LPC47M182

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