LPC47M182-NW Ver la hoja de datos (PDF) - SMSC -> Microchip
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LPC47M182-NW Datasheet PDF : 223 Pages
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Chapter 3
Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Description of Pin Functions
PIN#
NAME
(NOTE 1)
6,31,
49,60,
123
76,93,
107
71
8,29,
46,58,
78,96,
110
70
VCC
VTR
V_5P0_STBY
VSS
REF5V
72
REF5V_STBY
97
F_CAP
65
CLOCKI
91
CLOCKI32
52
nLPCPD
53
SER_IRQ
54
nLDRQ
55
PCI_CLK
56
nLFRAME
57,59, LAD[3:0]
61,62
63
nPCI_RESET
Table 3.1 - LPC47M182 Pin Description
DESCRIPTION
BUFFER
NAME
(NOTE 2)
POWER AND GROUND PINS (20)
+3.3 Volt Main Supply Voltage (5)
PWR
+3.3 Volt Standby Supply Voltage (4)
+5 Volt Standby Supply Voltage.
Ground (7)
PWR
PWR
PWR
5V Reference Output. Requires external AO
pull-up to VCC5V.
Highest System Standby Voltage.
AO
Requires external pull-up to
V_5P0_STBY.
Internal Regulator Filter Capacitor. This
pin is a no connect. A filter capacitor can
be placed on this pin if it is required by
system board layout.
CLOCKS (2)
14.318Mhz Clock Input
IS
32.768kHz Clock Input
IS
PROCESSOR/HOST LPC INTERFACE (11)
Active low input Power Down signal
indicates that the LPC47M182 should
prepare for power to be shut-off on the
LPC interface.
PCI_I
Serial IRQ pin used with the PCI_CLK pin
to transfer LPC47M182 interrupts to the
host.
PCI_IO
Active low output used for encoded
DMA/Bus Master request for the LPC
interface.
PCI_O
33.33 MHz PCI Clock input.
PCI_ICLK
Active low input indicates start of new
cycle and termination of broken cycle.
PCI_I
Active high LPC I/O used for multiplexed PCI_IO
command, address and data bus.
Active low input used as LPC Interface
Reset. 3.3V and 5V buffered copy of PCI
Reset signal is available on
nPCIRST_OUT and nIDE_RSTDRV.
These pins are listed under GLUE PINS.
PCI_I
PWR
WELL NOTES
(NOTE 3)
VCC
VTR
VCC
VTR
4
VCC
5
VCC
VCC
VCC
VCC
VCC
VCC
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
14
DATASHEET
SMSC LPC47M182
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