LPC47N267(2000) Ver la hoja de datos (PDF) - SMSC -> Microchip
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LPC47N267 Datasheet PDF : 180 Pages
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3.0 PIN DESCRIPTION
STQFP PIN #
23:20
24
25
26
27
28
29
30
17
1
2
3
4
5
8
9
10
11
12
NAME
LPC Address/
Data bus 3-0
LPC Frame
LPC
DMA/Bus
Master
Request
PCI RESET
LPC Power
Down
(Note 2)
PCI Clock
Controller
PCI Clock
Serial IRQ
Power Mgt.
Event
Drive Density
0
Drive Density
1
Motor On 0
Disk Change
Drive Select 0
Direction
Control
Step Pulse
Write Data
Write Gate
Head
Select
SYMBOL
BUFFER
TYPE PER
FUNCTION1
DESCRIPTION
LPC INTERFACE (12)
LAD[3:0]
PCI_IO
Active high LPC signals used for multiplexed
command, address and data bus.
nLFRAME
nLDRQ
PCI_I
PCI_O
Active low signal indicates start of new cycle and
termination of broken cycle.
Active low signal used for encoded DMA/Bus
Master request for the LPC interface.
nPCI_RESET
nLPCPD
PCI_I
PCI_I
Active low signal used as LPC Interface Reset.
Active low Power Down signal indicates that the
LPC47N267 should prepare for power to be shut
on the LPC interface.
nCLKRUN
PCI_OD
This signal is used to indicate the PCI clock status
and to request that a stopped clock be started.
PCI_CLK
PCI_CLK PCI clock input.
SER_IRQ
PCI_IO
Serial IRQ pin used with the PCI_CLK pin to
transfer LPC47N267 interrupts to the host.
nIO_PME
(O12/OD12) This active low Power Management Event signal
allows the LPC47N267 to request wakeup.
FLOPPY DISK INTERFACE (14)
DRVDEN0
(O12/OD12) Indicates the drive and media selected. Refer to
configuration registers CR03, CR0B, CR1F.
DRVDEN1
(O12/OD12) Indicates the drive and media selected. Refer to
configuration registers CR03, CR0B, CR1F.
nMTR0
(O12/OD12) These active low output selects motor drive 0.
nDSKCHG
IS
This input senses that the drive door is open or that
the diskette has possibly been changed since the
last drive selection. This input is inverted and read
via bit 7 of I/O address 3F7H. The nDSKCHG bit
also depends upon the state of the Force Disk
Change bits in the Force FDD Status Change
configuration register (see subsection CR17 in the
Configuration section).
nDS0
(O12/OD12) Active low output selects drive 0.
nDIR
(O12/OD12)
This high current low active output determines the
direction of the head movement. A logic “1” on this
pin means outward motion, while a logic “0” means
inward motion.
nSTEP
(O12/OD12) This active low high current driver issues a low
pulse for each track-to-track movement of the
head.
nWDATA
(O12/OD12) This active low high current driver provides the
encoded data to the disk drive. Each falling edge
causes a flux transition on the media.
nWGATE
(O12/OD12) This active low high current driver allows current to
flow through the write head. It becomes active just
prior to writing to the diskette.
nHDSEL
(O12/OD12)
This high current output selects the floppy disk side
for reading or writing. A logic “1” on this pin means
side 0 will be accessed, while a logic “0” means
side 1 will be accessed.
SMSC DS – LPC47N267
Page 8
Rev. 10/23/2000
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