SM5838AS Ver la hoja de datos (PDF) - Nippon Precision Circuits

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SM5838AS

5120 × 8-bit Synchronous FIFO

Nippon Precision Circuits  

SM5838AS

High-speed Conversion

For example, an NTSC signal interlace-to-noninter-

lace conversion. If interpolated line data can be

assumed to be similar to the preceding line data and

the write data rate is 14.3 MHz (4fSC), then conver-

sion can be realized by reading twice at 28.6 MHz

(8fSC).

Furthermore, interpolated line data, with appropriate

signal processing separation, can be read out line-by-

line by alternating between 2 SM5838AS devices (1

line/device).

In reality, however, double the number of devices are

required for luminance signal (Y) and color differ-

ence signal (C) systems. And triple the number of

devices are required for RGB signal systems.

Preceding line data used as interpolated line

012345

CLK

1819

012

WE

RW

nH

DIN

012

909 0 1 2

RE

OE

RR

DOUT

nH-1H

012345

nH

012345

nH

012345

909

909 *

*Output data 867 to 909 forms the preceding 1H data.

Interpolated data used as interpolated line

012345

CLK

1819

012

WE

RW

nH

(A)DIN

012

nH'

(B)DIN

012

909 0 1 2

909 0 1 2

(A)RE

(A)OE

(A)RR

(A)DOUT

(B)RE

nH

012345

909 *

(B)OE

(B)RR

(B)DOUT

nH'-1H

012345

nH'

012 345

909

*Output data 867 to 909 forms the preceding 1H data.

nH+1H

909

nH+1H

012345

909

909 *

nH+1H

909

nH'+1H

909

nH+1H

012345

909 *

909

NIPPON PRECISION CIRCUITS—10

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