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M30201

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Mitsumi 

Reset

Mitsubishi microcomputers

M30201 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

(1) Processor mode register 0

(2) Processor mode register 1

(3) System clock control register 0

(4) System clock control register 1

(5) Address match interrupt

enable register

(6) Protect register

(000416)···

0 0 00

(000516)··· 0

00

(000616)··· 0 1 0 0 1 0 0 0

(000716)··· 0 0 1 0 0 0 0 0

(000916)···

00

(000A16)···

000

(7) Watchdog timer control register

(8) Address match interrupt

register 0

(000F16)··· 0 0 0 ? ? ? ? ?

(001016)···

0016

(001116)···

0016

(9)

Address match interrupt

register 1

(001216)···

(001416)···

(001516)···

0 00 0

0016

0016

(001616)···

0000

(10) Key input interrupt control register (004D16)···

(11) A-D conversion interrupt

control register

(12)UART0 transmit interrupt control

register

(13)UreAgRisTte0r receive interrupt control

(14)UART1 transmit interrupt control

register

(15)UART1 receive interrupt control

register

(16)Timer A0 interrupt control register

(004E16)···

(005116)···

(005216)···

(005316)···

(005416)···

(005516)···

?000

?000

?000

?000

?000

?000

?000

(17)Timer X0 interrupt control register (005616)···

?0 0 0

(18)Timer X1 interrupt control register (005716)···

?000

(19)Timer X2 interrupt control register (005816)···

?000

(20)Timer B0 interrupt control register (005A16)···

?000

(21)Timer B1 interrupt control register (005B16)···

? 0 00

(22)INT0 interrupt control register

(005D16)···

00 ? 0 0 0

(23)INT1 interrupt control register

(005E16)···

00 ? 0 0 0

(24)Count start flag

(038016)··· 0 0 0 0 0 0 0

(25)Clock prescaler reset flag

(038116)··· 0

(26)One-shot start flag

(038216)···

0 0 00

(27)Trigger select flag

(038316)···

0016

(28)Up-down flag

(038416)···

0

0

(29)Timer A0 mode register

(039616)···

0016

(30)Timer X0 mode register

(039716)···

0016

(31)Timer X1 mode register

(039816)···

0016

(32)Timer X2 mode register

(039916)···

0016

(33) Timer B0 mode register

(34) Timer B1 mode register

(35) UART0 transmit/receive mode

register

(36) UART0 transmit/receive control

register 0

(37)

UART0

register

transmit/receive

1

control

(38) UART1 transmit/receive mode

register

(39) UART1 transmit/receive control

register 0

(40) UART1 transmit/receive control

register 1

(41) UART transmit/receive control

register 2

(42) Flash memory control register 0

(Note )

(43) Flash memory control register 1

(Note)

(44) Flash command register

(039B16)··· 0 0 ? 0 0 0 0

(039C16)··· 0 0 ? 0 0 0 0

(03A016)···

0016

(03A416)··· 0 0 0 0 1 0 0 0

(03A516)··· 0 0 0 0 0 0 1 0

(03A816)···

0016

(03AC16)··· 0 0 0 0 1 0 0 0

(03AD16)··· 0 0 0 0 0 0 1 0

(03B016)··· 0 0 0 0 0 0 0

(03B416)··· 0 0 1 0 0 0 0 0

(03B516)···

00

(03B616)···

0016

(45) A-D control register 2

(03D416)···

0 000

(46) A-D control register 0

(03D616)··· 0 0 0 0 0 ? ? ?

(47) A-D control register 1

(03D716)···

0016

(48) Port P0 direction register

(03E216)···

0016

(49) Port P1 direction register

(03E316)···

0016

(50) Port P2 direction register

(03E616)··· 0 0 0 0 0 0 0

(51) Port P3 direction register

(03E716)···

00 00 00

(52) Port P4 direction register

(03EA16)···

0 00 0 00

(53) Port P5 direction register

(03EB16)···

000 00

(54) Port P6 direction register

(55) Port P7 direction register

(56) Pull-up control register 0

(57) Pull-up control register 1

(58) Port P1 drive capacity control

register

(59) Data registers (R0/R1/R2/R3)

(03EE16)···

(03EF16)···

(03FC16)···

(03FD16)···

(03FE16)···

0016

00

0016

0016

0016

000016

(60) Address registers (A0/A1)

000016

(61) Frame base register (FB)

000016

(62) Interrupt table register (INTB)

0000016

(63) User stack pointer (USP)

000016

(64) Interrupt stack pointer (ISP)

000016

(65) Static base register (SB)

000016

(66) Flag register (FLG)

000016

x : Nothing is mapped to this bit

? : Undefined

The content of other registers and RAM is undefined when the microcomputer is reset. The initial values

must therefore be set.

Note: This register is only exist in flash memory version.

Figure 1.13. Device's internal status after a reset is cleared

15

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