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M37516E6HP Ver la hoja de datos (PDF) - Renesas Electronics

Número de pieza
componentes Descripción
Lista de partido
M37516E6HP
Renesas
Renesas Electronics Renesas
M37516E6HP Datasheet PDF : 90 Pages
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7516 Group
XCIN
Main clock division ratio 10
selection bits (Note)
00
XIN
01
1/8
1/16
1/32
1/64
1/128
1/256
Internal synchronous
clock selection bits
Data bus
P03/SRDY2
P03 latch
0
Serial I/O2 synchronous
clock selection bit
1
SRDY2 Synchronous circuit
SRDY2 output enable bit
1
0
External clock
P02/SCLK2
P01/SOUT2
P02 latch
0
1
Serial I/O2 port selection bit
P01 latch
0
1
Serial I/O2 port selection bit
P00/SIN2
Optional transfer bits (3)
Serial I/O counter 2 (3)
Serial I/O2 register (8)
Serial I/O2
interrupt request
P43 latch
P43/SCMP2/INT2
0
D
Q
1
Serial I/O2 I/O comparison
signal control bit
Note: Either high-speed, middle-speed or low-speed mode is selected by bits 6 and 7 of CPU mode register.
Fig. 24 Block diagram of Serial I/O2
Transfer clock (Note 1)
Write-in signal to
serial I/O2 register
Serial I/O2 output SOUT2
Serial I/O2 input SIN2
Receive enable signal SRDY2
D0
D1 . D2
D3
D4
D5
D6
(Note 2)
D7
Serial I/O2 interrupt request bit set
Notes 1: When the internal clock is selected as a transfer clock, the f(XIN) clock division (f(XCIN) in low-speed mode) can be selected
by setting bits 0 to 2 of serial I/O2 control register 1.
2: When the internal clock is selected as a transfer clock, the SOUT2 pin has high impedance after transfer completion.
Fig. 25 Timing chart of Serial I/O2
Rev.1.01 Jul 01, 2003 page 27 of 89

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