MC74HC390ADG(2014) Ver la hoja de datos (PDF) - ON Semiconductor

Número de pieza

componentes Descripción

Lista de partido

MC74HC390ADG
(Rev.:2014)

Dual 4-Stage Binary Ripple Counter with ÷ 2 and ÷ 5 Sections

ON Semiconductor 

MC74HC390A

Dual 4-Stage Binary Ripple

Counter with ÷ 2 and ÷ 5

Sections

High−Performance Silicon−Gate CMOS

The MC74HC390A is identical in pinout to the LS390. The device

inputs are compatible with standard CMOS outputs; with pullup

resistors, they are compatible with LSTTL outputs.

This device consists of two independent 4−bit counters, each

composed of a divide−by−two and a divide−by−five section. The

divide−by−two and divide−by−five counters have separate clock

inputs, and can be cascaded to implement various combinations of ÷ 2

and/or ÷ 5 up to a ÷ 100 counter.

Flip−flops internal to the counters are triggered by high−to−low

transitions of the clock input. A separate, asynchronous reset is

provided for each 4−bit counter. State changes of the Q outputs do not

occur simultaneously because of internal ripple delays. Therefore,

decoded output signals are subject to decoding spikes and should not

be used as clocks or strobes except when gated with the Clock of the

HC390A.

Features

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1 mA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No 7 A

• Chip Complexity: 244 FETs or 61 Equivalent Gates

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

CLOCK A 1, 15

÷2

COUNTER

3, 13 QA

CLOCK B 4, 12

÷5

COUNTER

5, 11 QB

6, 10

7, 9

QC

QD

RESET

2, 14

Figure 1. Logic Diagram

PIN 16 = VCC

PIN 8 = GND

© Semiconductor Components Industries, LLC, 2014

1

August, 2014 − Rev. 7

http://onsemi.com

SOIC−16

D SUFFIX

CASE 751B

TSSOP−16

DT SUFFIX

CASE 948F

PIN ASSIGNMENT

CLOCK Aa 1

RESET a 2

QAa 3

CLOCK Ba 4

QBa 5

QCa 6

QDa 7

GND 8

16 VCC

15 CLOCK Ab

14 RESET b

13 QAb

12 CLOCK Bb

11 QBb

10 QCb

9 QDb

MARKING DIAGRAMS

16

HC390AG

AWLYWW

1

16

HC

390A

ALYWG

G

1

SOIC−16

TSSOP−16

A

L, WL

Y, YY

W, WW

G or G

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

(Note: Microdot may be in either location)

FUNCTION TABLE

Clock

AB

XX

X

X

Reset

H

L

L

Action

Reset

÷ 2 and ÷ 5

Increment

÷2

Increment

÷5

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

Publication Order Number:

MC74HC390A/D

Share Link: