FEDR27V3252J-01-02 Ver la hoja de datos (PDF) - Oki Electric Industry
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FEDR27V3252J-01-02 Datasheet PDF : 12 Pages
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OKI Semiconductor
FEDR27V3252J-01-02
MR27V3252J / OTP
BLOCK DIAGRAM
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
PIN DESCRIPTIONS
Pin name
D15 / A–1
A0 to A20
D0 to D14
CE#
OE#
BYTE#/VPP
VCC
VSS
NC
A–1
× 8/× 16 Switch
CE#
OE#
BYTE#/VPP
CE
OE
Memory Cell Matrix
2M × 16-Bit or 4M × 8-Bit
Multiplexer
Output Buffer
D0 D2 D4 D6 D8 D10 D12 D14
D1 D3 D5 D7 D9 D11 D13 D15
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
Functions
Data output / Address input
Address inputs
Data outputs
Chip enable input
Output enable input
Mode switch/Program power supply voltage
Power supply voltage
Ground
No connect
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