¡ Semiconductor
MSM7557
AC Characteristics
Parameter
Transmit
Carrier Frequency
Transmit
Carrier Level
Receive Carrier
Input Level
Bit Error Rate
1200
bps
2400
bps
Number of PLL Lock-in
Data Bits *1
Symbol
fM1
fS1
fM2
fS2
VOX
VIR
BER
VIR
DYN = "0" : VDD = 2.7 V to 5.5 V, Ta = –30°C to 70°C
DYN = "1" : VDD = 4.5 V to 5.5 V, Ta = –30°C to 70°C
Condition
Min.
Typ.
Max.
Unit
SD = "1"
SD= "0"
SD = "1"
SD= "0"
R1 = R2
BR = "0"
ME= "1"
BR = "1"
ME= "1"
DYN = "0"
DYN = "1"
1199
1799
1199
2399
–11
–3
1200
1800
1200
2400
–9
–1
1201
1801
Hz
1201
2401
–7
+1
dBV
–32
—
–2
8 dB —
1 ¥ 10-3
—
Defined at 10 dB —
5 ¥ 10-5
—
RAIO
11 dB —
1 ¥ 10-3
—
—
13 dB —
5 ¥ 10-5
—
Number of data bits
required for the PLL to
be locked in within the —
—
18
phase difference of
22.5° or less
bit
Number of data bits
required for the PLL to
be locked in within the —
—
11
phase difference of
90° or less
*1 Receive MSK signal is bit synchronous signal (modulated signal of alternating "0", "1" pattern).
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