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MT9123AP Ver la hoja de datos (PDF) - Mitel Networks

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Lista de partido
MT9123AP
Mitel
Mitel Networks Mitel
MT9123AP Datasheet PDF : 32 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Preliminary Information
MT9123
C4i
F0i
F0od
PORT1
Rin
0
1
2
ECA
ECB
76 54321076 543210
3
4
Sout
PORT2
Sin
76 54321076 543210
ECA
ECB
76 54321076 543210
Rout
76 54321076 543210
outputs=High impedance
inputs = don’t care
In ST-BUS Mode 1, both echo canceller I/O channels are assigned to ST-BUS timeslots 0 and 1. Note that the user
could configure PORT1 and PORT2 into different ST-BUS modes. The pin F0od is always delayed 4 time slots to permit
a more flexible interleave of ST-BUS modes.
Figure 5 - ST-BUS 8 Bit Companded PCM I/O on Timeslots 0 & 1 (Mode 1)
C4i
F0i
F0od
PORT1
Rin
0
1
2
3
4
ECA
ECB
76 54321076 543210
Sout
PORT2
Sin
76 54321076 543210
ECA
ECB
76 54321076 543210
Rout
76 54321076 543210
outputs=High impedance
inputs = don’t care
In ST-BUS Mode 2, both echo canceller I/O channels are assigned to ST-BUS timeslots 2 and 3. Note that the user
could configure PORT1 and PORT2 into different ST-BUS modes. The pin F0od is always delayed 4 time slots to permit
a more flexible interleave of ST-BUS modes.
Figure 6 - ST-BUS 8 Bit Companded PCM I/O on Timeslots 2 & 3 (Mode 2)
8-57

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